JPH0214791B2 - - Google Patents
Info
- Publication number
- JPH0214791B2 JPH0214791B2 JP54172014A JP17201479A JPH0214791B2 JP H0214791 B2 JPH0214791 B2 JP H0214791B2 JP 54172014 A JP54172014 A JP 54172014A JP 17201479 A JP17201479 A JP 17201479A JP H0214791 B2 JPH0214791 B2 JP H0214791B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- molybdenum
- polycrystalline silicon
- silicide
- gate electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 21
- 229910052750 molybdenum Inorganic materials 0.000 claims description 21
- 239000011733 molybdenum Substances 0.000 claims description 21
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 17
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 claims description 13
- 229910021344 molybdenum silicide Inorganic materials 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 230000008018 melting Effects 0.000 claims description 2
- 238000002844 melting Methods 0.000 claims description 2
- 238000005275 alloying Methods 0.000 claims 1
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 230000005669 field effect Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- -1 Arsenic ions Chemical class 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- GQNZGCARKRHPOH-RQIKCTSVSA-N miocamycin Chemical compound C1[C@](OC(C)=O)(C)[C@@H](OC(=O)CC)[C@H](C)O[C@H]1O[C@H]1[C@H](N(C)C)[C@@H](O)[C@H](O[C@@H]2[C@H]([C@H](OC(=O)CC)CC(=O)O[C@H](C)C/C=C/C=C/[C@H](OC(C)=O)[C@H](C)C[C@@H]2CC=O)OC)O[C@@H]1C GQNZGCARKRHPOH-RQIKCTSVSA-N 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 150000003017 phosphorus Chemical class 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
【発明の詳細な説明】
本発明は、モリブデンを主材とするゲート電極
を有するMIS電界効果半導体装置の製造方法に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a MIS field effect semiconductor device having a gate electrode mainly made of molybdenum.
近年、MIS電界効果半導体装置のゲート電極と
してモリブデンが用いられようとしている。 In recent years, molybdenum has been used as a gate electrode for MIS field effect semiconductor devices.
しかしながら、ゲート絶縁膜の上にモリブデン
被膜を形成すると、多結晶シリコン被膜の場合と
比較して、仕事関数φMが大になり、また、表
（界）面電荷量QSSも大になるので不安定になる。 However, when a molybdenum film is formed on the gate insulating film, the work function φ M becomes larger and the surface (interfacial) charge Q SS also becomes larger, compared to the case of a polycrystalline silicon film. Becomes unstable.
そこで、モリブデン・シリサイド（Mosil）−
モリーブデン（Mo）の２層構造にしたもの（要
すれば特公昭49−14794号公報参照）、多結晶シリ
コン−モリブデンの２層構造にしたもの（要すれ
ば特公昭54−11674号公報参照）などが提案され
ているが、これは、いずれもモリブデンそのもの
を用いている為、次のような欠点がある。 Therefore, molybdenum silicide (Mosil)
Those with a two-layer structure of molybdenum (Mo) (refer to Japanese Patent Publication No. 49-14794 if necessary), those with a two-layer structure of polycrystalline silicon and molybdenum (refer to Japanese Patent Publication No. 11674-1977 if necessary) However, since they all use molybdenum itself, they have the following drawbacks.
(1) モリブデンとフオト・レジスタとの密着性が
多結晶シリコンとフオト・レジストほどは良く
ないので、精密なパターニングが困難である。(1) Precise patterning is difficult because the adhesion between molybdenum and photoresist is not as good as that between polycrystalline silicon and photoresist.
(2) モリブデンは酸化され易いので、アルミニウ
ムの配線などと接続する場合にコンタクト不良
を起し易い。(2) Since molybdenum is easily oxidized, contact failure is likely to occur when connecting it to aluminum wiring, etc.
本発明は、モリブデン・シリサイドのゲート電
極を有するMIS電界効果半導体装置を容易に製造
する方法を提供するものであり、以下これを詳細
に説明する。 The present invention provides a method for easily manufacturing a MIS field effect semiconductor device having a gate electrode of molybdenum silicide, which will be described in detail below.
第１図乃至第４図は本発明一実施例を説明する
為の工程要所に於ける半導体装置の要部側断面説
明図であり、次に、これ等の図を参照しつつ記述
する。 1 to 4 are explanatory side cross-sectional views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention, and the following description will be made with reference to these figures.
第１図参照
(1) シリコン半導体基板１に窒化シリコン・マス
クを用いた選択酸化法を適用してフイールド絶
縁膜２を形成し、次いで、通常の技法を適用し
てゲート絶縁膜３を形成する。Refer to Figure 1 (1) A field insulating film 2 is formed on a silicon semiconductor substrate 1 by applying a selective oxidation method using a silicon nitride mask, and then a gate insulating film 3 is formed by applying a normal technique. .
第２図参照
(2) スパツタ法を適用し、厚さ2000〔Å〕程度の
モリブデン膜４を形成する。Refer to FIG. 2 (2) A sputtering method is applied to form a molybdenum film 4 with a thickness of about 2000 Å.
(3) 化学気相成長法（CVD法）に依り厚さ2000
〔Å〕程度の燐含有多結晶シリコン膜５を成長
させる。(3) Thickness 2000mm by chemical vapor deposition method (CVD method)
A phosphorus-containing polycrystalline silicon film 5 having a thickness of approximately [Å] is grown.
尚、この燐含有多結晶シリコン膜５は燐含有
モリブデン・シリサイド膜に代えても良い。 Note that this phosphorus-containing polycrystalline silicon film 5 may be replaced with a phosphorus-containing molybdenum silicide film.
第３図参照
(4) フオト・リソグラフイ技術を適用し、フオ
ト・レジスト膜６をマスクとして多結晶シリコ
ン膜５、モリブデン膜４、ゲート絶縁膜３のパ
ターニングを行なう。Refer to FIG. 3 (4) Applying the photolithography technique, the polycrystalline silicon film 5, molybdenum film 4, and gate insulating film 3 are patterned using the photoresist film 6 as a mask.
(5) イオン注入法に依り砒素イオンのデポジシヨ
ンを行なう。(5) Arsenic ions are deposited by ion implantation.
第４図参照
(6) 近赤外線又は可視光レーザに依り局部加熱を
行ない、多結晶シリコン膜５とモリブデン膜４
とを溶融して均質な燐含有モリブデン・シリサ
イドからなるゲート電極７を形成するとともに
工程(5)で砒素イオンをデポジシヨンした部分の
レーザ・アニールを行なう。図に於ける記号８
はn+型ソース領域を、また記号９はn+型ドレ
イン領域をそれぞれ表わしている。See Figure 4 (6) Local heating is performed using a near-infrared or visible laser to heat the polycrystalline silicon film 5 and molybdenum film 4.
A gate electrode 7 made of homogeneous phosphorus-containing molybdenum silicide is formed by melting the silicide, and the portion where arsenic ions are deposited in step (5) is laser annealed. Symbol 8 in the diagram
9 represents an n + type source region, and symbol 9 represents an n + type drain region.
この工程では、最初、レーザ・エネルギが多
結晶シリコン膜５に吸収されてそれが溶融し、
モリブデン膜４と反応するものであり、若し、
モリブデン膜４が多結晶シリコン膜５の上に在
ると、レーザ光が反射されるので加熱の効率は
悪くなる。 In this process, laser energy is first absorbed into the polycrystalline silicon film 5 and melts it.
It reacts with the molybdenum film 4, and if
If the molybdenum film 4 is on the polycrystalline silicon film 5, the laser beam will be reflected, resulting in poor heating efficiency.
尚、ここで用いた近赤外線レーザは、Ｑスイ
ツチYAGレーザであり、出力は２〔ワツト〕、
ビーム径は50〔μｍ〕φであつた。 The near-infrared laser used here is a Q-switch YAG laser, with an output of 2 [watts].
The beam diameter was 50 [μm]φ.
(7) この後、通常の技法を適用して装置を完成さ
せる。(7) After this, normal techniques are applied to complete the device.
このようにして作製した装置では、ゲート電極
７が均質なモリブデン・シリサイドであつて、そ
の仕事関数φMは多結晶シリコンのそれに近く、
また、燐のゲツタ作用に依り、表面電荷量QSSも
小さくなる。また、本実施例に於けるように、近
赤外或いは可視の範囲のレーザ光を用いると、多
結晶シリコンにエネルギが良く吸収され、液相拡
散で下層のモリブデンと均一に合金化され、しか
も、モリブデン・シリサイド化が進行するとエネ
ルギに対する反射率が高くなり、過剰なレーザ光
照射が行われても加熱は自動停止される状態とな
り、従つて、ゲート絶縁膜３とモリブデン膜４と
の界面で過熱に依つて両者が反応することは抑止
される。 In the device manufactured in this way, the gate electrode 7 is made of homogeneous molybdenum silicide, and its work function φ M is close to that of polycrystalline silicon.
Furthermore, due to the gettering effect of phosphorus, the amount of surface charge Q SS also decreases. Furthermore, when near-infrared or visible laser light is used as in this example, energy is well absorbed by polycrystalline silicon, and it is uniformly alloyed with the underlying molybdenum layer by liquid phase diffusion. As molybdenum silicide progresses, the reflectance to energy increases, and heating is automatically stopped even if excessive laser beam irradiation is performed. Reaction between the two due to overheating is inhibited.
以上の説明で判るように、本発明に依れば、
MIS電界効半導体装置を製造するに際し、ゲート
絶縁膜上にモリブデン膜及び多結晶シリコン膜或
いはモリブデン・シリサイド膜を形成し、それ等
の膜をゲートの形状にパターニングしてからレー
ザ・ビームを照射して多結晶シリコン膜或いはモ
リブデン・シリサイド膜とその下のモリブデン膜
とを溶融して合金化させ均質なモリブデン・シリ
サイドからなるゲート電極を形成するものである
から、パターニング時にフオト・レジストが塗布
されるのは多結晶シリコン膜であり、モリブデン
膜ではないから、その密着性は良好であつて精密
なパターニングを行なうことができる。そして、
得られるゲート電極はモリブデン・シリサイドで
あるから、アルミニウム配線とのコンタクト性は
良好であり、仕事関数φM及び表面電荷量QSSとも
に小さい。 As can be seen from the above explanation, according to the present invention,
When manufacturing an MIS field effect semiconductor device, a molybdenum film, a polycrystalline silicon film, or a molybdenum silicide film is formed on the gate insulating film, and these films are patterned into the shape of the gate and then irradiated with a laser beam. Since the polycrystalline silicon film or molybdenum silicide film and the underlying molybdenum film are melted and alloyed to form a gate electrode made of homogeneous molybdenum silicide, a photoresist is applied during patterning. Since it is a polycrystalline silicon film and not a molybdenum film, its adhesion is good and precise patterning can be performed. and,
Since the obtained gate electrode is made of molybdenum silicide, it has good contact with the aluminum wiring, and both the work function φ M and the surface charge amount Q SS are small.
第１図乃至第４図は本発明一実施例を説明する
為の工程要所に於ける半導体装置の要部側断面説
明図である。
図に於いて、１は基板、２はフイルド絶縁膜、
３はゲート絶縁膜、４はモリブデン膜、５は多結
晶シリコン膜、６はフオト・レジスト膜、７はゲ
ート電極、８はソース領域、９はドレイン領域で
ある。
1 to 4 are side cross-sectional views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention. In the figure, 1 is a substrate, 2 is a field insulating film,
3 is a gate insulating film, 4 is a molybdenum film, 5 is a polycrystalline silicon film, 6 is a photoresist film, 7 is a gate electrode, 8 is a source region, and 9 is a drain region.
Claims (1)
リコン膜或いはモリブデン・シリサイド膜を形成
し、それ等の膜をゲート形状にパターニングして
からレーザ・ビームを照射して多結晶シリコン膜
或いはモリブデン・シリサイド膜とモリブデン膜
とを溶融し合金化させて均質なモリブデン・シリ
サイドのゲート電極を形成する工程が含まれるこ
とを特徴とするMIS電荷半導体装置の製造方法。1 Form a molybdenum film and a polycrystalline silicon film or a molybdenum silicide film on the gate insulating film, pattern these films into a gate shape, and then irradiate a laser beam to form a polycrystalline silicon film or molybdenum silicide film. 1. A method for manufacturing an MIS charge semiconductor device, comprising the step of melting and alloying a molybdenum film and a molybdenum film to form a homogeneous molybdenum silicide gate electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17201479A JPS5694671A (en) | 1979-12-27 | 1979-12-27 | Manufacture of mis field-effect semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17201479A JPS5694671A (en) | 1979-12-27 | 1979-12-27 | Manufacture of mis field-effect semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5694671A JPS5694671A (en) | 1981-07-31 |
| JPH0214791B2 true JPH0214791B2 (en) | 1990-04-10 |
Family
ID=15933921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17201479A Granted JPS5694671A (en) | 1979-12-27 | 1979-12-27 | Manufacture of mis field-effect semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5694671A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL8303179A (en) * | 1983-09-15 | 1985-04-01 | Philips Nv | SEMICONDUCTOR DEVICE. |
| JPH084078B2 (en) * | 1985-05-27 | 1996-01-17 | 富士通株式会社 | Method for manufacturing semiconductor device |
| JP2660056B2 (en) * | 1989-09-12 | 1997-10-08 | 三菱電機株式会社 | Complementary MOS semiconductor device |
| TW232751B (en) | 1992-10-09 | 1994-10-21 | Semiconductor Energy Res Co Ltd | Semiconductor device and method for forming the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53114671A (en) * | 1977-03-17 | 1978-10-06 | Toshiba Corp | Manufacture for semiconductor device |
-
1979
- 1979-12-27 JP JP17201479A patent/JPS5694671A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53114671A (en) * | 1977-03-17 | 1978-10-06 | Toshiba Corp | Manufacture for semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5694671A (en) | 1981-07-31 |
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