JPH0214684A - Image pickup device - Google Patents

Abstract

PURPOSE:To observe an object image with fast movement on a television screen while being decomposed finner by applying high speed pickup for plural number of times during one field period. CONSTITUTION:An electronic charge stored in a photoelectric conversion element 101 is moved to a vertical transfer CCD 102 within a short time during one field period, and the charge is transferred at a fast speed in a horizontal transfer CCD 104 from the vertical transfer CCD 102 and a series of operations are applied during one field period for plural number of times. Thus, line number of the output of a pickup signal obtained at the output of the horizontal transfer CCD 104 is selected during one field more than a conventional device, e.g., N times of the conventional device and N-set of pickup is applied during one field period and an object with fast movement is picked up delicately.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an imaging device that can obtain a reproduced image without image blur when a single shadow of a fast-moving subject is taken.

[Conventional technology]

FIG. 4 shows an example of an interline type CC as an image sensor.
This figure shows a basic structural schematic diagram of a damage device using D.

In FIG. 4, 401 is a photoelectric conversion element arranged two-dimensionally in vertical and horizontal directions, and 402 is a vertical transfer CCD.
are arranged vertically close to the photoelectric conversion element, and transfer signal charges accumulated in the photoelectric conversion element in the vertical direction.

403 is a transfer gate, and each photoelectric conversion element is connected to a vertical transfer CCD via the transfer gate. 4
04 is a horizontal transfer CCD, which is connected to the final stage of the vertical transfer COD and converts the signal charge sent from the vertical transfer CCD into 1
Output as a horizontal line signal. 405 is horizontal transfer CC
This is an output amplifier for amplifying the output of D. 406 converts the signal from the output amplifier into a television signal, e.g.
This is a signal processing circuit that converts it into an SC signal. 407 is a television signal output terminal.

408 is a drive pulse generation circuit, which generates clock pulses φT to the transfer gate, vertical transfer COD and horizontal transfer COD.
, φv1 to φv4 and φH1 to φit. The clock pulse φT is generated every field, and the signal charges accumulated in each photoelectric conversion element are vertically transferred CO.
Transfer to D. The clock pulses φvl to φv4 are sequentially phase-shifted pulses having one horizontal period, and sequentially transfer the signal charge sent to the vertical transfer CCD toward the horizontal transfer CCD. The clock pulses φold to φH2 are also the same as the above φvl.
~φν4, the signal charges for one horizontal line received from the vertical transfer CCD are sequentially transferred in the output direction, and
A signal is output every horizontal period.

The gist of the above operation will be explained with reference to FIG. 5, as an example of the standard imaging state and the high-speed shutter imaging state.

FIG. 5(a) shows the standard ↑most image state. As shown in (A), a transfer gate clock pulse φT having a field period (1/60 second) is applied to the transfer gate 403. The signal charge accumulated in the photoelectric conversion element 401 through the transfer gate 403 as shown in (C) is vertically transferred C.
Transferred to OD. Therefore, the signal charge accumulated in the photoelectric conversion element is reset, and from that point until the next pulse φ is applied again as shown in (C), that is, approximately one field period (NTSC signal in this example). In the case of 1/
A signal corresponding to the incident light is accumulated in the photoelectric conversion element over a period of 60 seconds). The signal charges thus transferred to the vertical transfer CCD 402 are moved within the vertical transfer CCD by the clock pulse φν (consisting of 4-phase clock pulses φv1 to φv4, but shown as φV for simplicity) shown in (B) during the vertical scanning period. do. The signals thus transferred to the final stage of the vertical transfer CCD are then sequentially transferred to the horizontal transfer stage every horizontal period (IH). Clock pulse φH for horizontal transfer (4-phase clock pulses φH1 to φH4) for each IH
The signal charges are transferred toward the output section by generating a number of charges corresponding to the number of photoelectric conversion elements in the horizontal direction (not shown) and applying them to the horizontal transfer CCD 404.
An image output as shown in (D) is obtained. That is, signal charges accumulated in one field period are sequentially output as signals in the next one field period. In other words, this is equivalent to obtaining a still image signal with a shutter speed of 1/60 second. When recording and reproducing signals in the standard imaging state as described above in a magnetic recording/reproducing device or the like, if the subject is a fast-moving subject, image blur will occur if the subject is viewed in slow motion or still reproduction.

In order to reduce such image blur, high-speed imaging is performed as described below. For this purpose, the changeover switch 409 of the drive pulse generation circuit 408 shown in FIG.
The clock pulse φ for the transfer gate is switched from to the high-speed side.
T and the clock pulse φν for vertical transfer are changed from the standard operation, and the charge accumulation time in the photoelectric conversion element is changed to, for example, 1/1000 second. An example of the operation at this time is shown in Fig. 5(b). First, as shown in (^°),
A first clock pulse φT is applied to the transfer gate, the charge accumulated in the photoelectric conversion element is transferred to the vertical transfer CCD, and the photoelectric conversion element is reset as shown in (C'').

Next, the charge transferred to the vertical transfer COD is a high-speed transfer pulse that is transferred in the opposite direction to the normal direction and at high speed. As shown in (Bo), the number of charges is at least equivalent to the number of photoelectric conversion elements arranged in the vertical direction. is generated and this is vertically transferred COD
to be applied. As a result, this charge is not sent to the horizontal transfer CCD, but is discharged to the outside of the vertical transfer COD. After the unnecessary charges are discharged to the outside at a high speed, the second pulse is generated 1/1000 seconds after the first pulse as shown in (A).
A clock pulse φT of φT is applied to the transfer gate.

As a result, the photoelectric conversion element that was reset earlier (C
As shown in o), the accumulated charges are transferred to the vertical transfer CCD. After this, the same operation as in the standard imaging state described above is performed, and the signal charge is transferred to the vertical transfer CCD and horizontal transfer CCD.
The output section sequentially outputs signals as shown in (Do).

The same operation is repeated thereafter.

With this operation, a shutter speed of 1/1000 seconds can be obtained during high-speed imaging compared to the shutter speed of 1760 seconds. This allows you to capture fast-moving subjects with less blur.

[Problem to be solved by the invention]

Conventional imaging devices are configured as described above, so when trying to obtain a high-speed imaging state, the subject is captured only once during a specific period within one field, and the subject is captured only once during a specific period within one field. I can't grasp it. Therefore, even if you take a close look at the subject's movement, record it, and play it back in slow still mode,
You cannot see smaller movements.

This invention was made to solve the above-mentioned problems, and it is an imaging method that achieves the effect of a high-speed shutter operation that can break down a subject into more detail than before and take a single image, especially when imaging a fast-moving subject. The purpose is to obtain equipment.

[Means to solve the problem]

A first imaging device according to the present invention vertically transfers charges accumulated in a photoelectric conversion element within a short time within one field period.
, and is configured to transfer this at high speed within the vertical transfer CCD and horizontal transfer CCD, and is configured to perform the above series of operations multiple times within the L field period as necessary. be.

[Effect]

The imaging device according to the present invention increases the transfer speed of the vertical transfer CCD and the horizontal transfer CCD, thereby achieving
The number of lines of the image pickup signal output obtained from the output of the horizontal transfer COD is increased within one field, for example, N times the conventional number. As a result, N shadows are performed within one field period, and a fast-moving subject can be shadowed more precisely than before.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, lot is a photoelectric conversion element arranged two-dimensionally in the vertical and horizontal directions, and converts the object image projected by the optical system into an electrical signal. 102 is vertical transfer CO
D, which is arranged vertically close to the photoelectric conversion element 101 and is an element for vertically transmitting the signal charges accumulated in the photoelectric conversion element 101. Reference numeral 103 denotes a transfer gate, and each photoelectric conversion element is connected to the vertical transfer CCD 102 via this transfer gate. By applying a pulse to the transfer gate, the signal charge accumulated in the photoelectric conversion element is transferred to the vertical transfer CCD 102. is read out, thus resetting the charge accumulation in the photoelectric conversion element. A horizontal transfer COD 104 is connected to the final stage of the vertical transfer CCDs 102, receives signal charges of one scanning line at a time from the final stages of all the vertical transfer CCDs 102, and sends them to the output section as a -scanning line signal. 105 is horizontal transfer CCD10
This is an output amplifier for amplifying the output of 4. 120 is a memory, memory A121. B122, -, etc., and the amplifier 105 is connected to the horizontal transfer CCD 104.
The signals sent through are stored in A, B, , etc. as appropriate, and the output terminals are also connected to these memories A, B, -.
The contents of are read out in a desired combination, and ↑ damage signals are sent out sequentially in units of one horizontal line. Reference numeral 125 is a control input for putting the memory 120 into a desired operating state. 106 outputs the output of the memory 120 from the television signal 0, for example, NTSC.
This is a signal processing circuit that converts signals into signals.

107 is a television signal output terminal. Reference numeral 108 denotes a driving pulse generation circuit, which generates pulses φT, φv1 to φv4 . Sends φH1 to φ■4. The manner in which these clock pulses are generated is changed by a changeover switch 109.

When the changeover switch 109 is turned down to 1/60 of the figure, the standard imaging state described in the conventional example is achieved, and the changeover switch 109
If you move to the high speed side, you will enter the high speed imaging state, and then move to high speed 1 and 2.
．．・As the value becomes -, high-speed imaging with higher resolution becomes possible.

Next, the operation will be explained.

First, in the standard operating state, the selector switch 109 is turned down to 1/60. At this time, the photoelectric conversion element 101. Vertical transfer CCD
102. Transfer gate 103. Horizontal transfer CCD104.
The drive pulse generating circuit 108 and the like operate in the same manner as described in the conventional example. That is, at the output of the output amplifier 105, light from the object enters the photoelectric conversion element through the optical system, the light is converted into electric charge, and a video signal is sequentially transmitted based on the electric charge accumulated in the photoelectric conversion element for one field period. It's coming.

This is an image with one shadow at a shutter speed of 1/60 seconds. Next, this video signal is sent to the memory 120, for example, is stored in the memory A 121 and then read out, or is not stored in the memory 120 and is passed through as is, and is sent out as an output of the memory 120, and the signal is The processing circuit 106 converts the signal into an NTSC signal.

Next, a high-speed imaging state will be explained. Changeover switch 10
When 9 is set to high speed 1, the light ″:′i conversion element 101
．． Vertical transfer CCD 102. The transfer gate 103, horizontal transfer CCD IO4, drive pulse generation circuit 108, etc. operate in the same manner as described in the description of the high-speed imaging of the conventional example. In other words, the charge accumulated in a very short period of time, for example, 1/1000 seconds at a specific point within one field period, is reduced to approximately 1
The information in the CCD is transferred between the fields, and the amplifier 1
05 output sequentially. In this case 1/1000
This means that an image with one shadow can be obtained at a shutter speed of seconds. Next, this video signal is sent to the memory 120, where it is treated in the same way as in the standard imaging state.
converted into a signal.

When the selector switch 109 is set to high speed 2, the following occurs. This will be explained with reference to FIG.

First, as shown in FIG. 2(A), a first clock pulse φT is generated and sent to the transfer gate 103, and the charge accumulated in the photoelectric conversion element is transferred to the vertical transfer CCD 10.
Move to 2. At this time, the charge of the photoelectric conversion element 101 is (C)
It will be reset as shown in . Next, vertical transfer CCD I
The charges transferred to O2 are transferred at high speed in the opposite direction to the normal direction (in the direction opposite to the arrow shown in the vertical transfer CCD in FIG. 1).

That is, as shown in (B), clock pulses φV (consisting of φv1 to φv4, the phase relationship of which is appropriately set) are generated at high speed for a number of times equal to or greater than the number of photoelectric conversion elements arranged vertically. Charge is transferred quickly and reversely within 1000 seconds. As a result, this charge is transferred to the horizontal transfer CCD 1
04, but are all discharged to the outside from another end of the vertical transfer CCD 102. This situation is shown in (Co). After unnecessary charges are discharged to the outside in this way (
As shown in A), the second clock pulse φT is applied to the transfer gate 103, for example, 1/1000 seconds after the first clock pulse φT. As a result, the charge accumulated in the photoelectric conversion element 101 that was reset earlier is then transferred to the vertical transfer CCD 102 as shown in (C). At this time, the charge in the photoelectric conversion element 101 is reset to (C,). As shown, accumulation begins again. (B) so that the signal charges transferred in this way are transferred at a higher speed than the transfer speed in the normal direction in the standard imaging state or the high speed 1 state, that is, in this case, at approximately twice the speed;
As shown in , the high-speed transfer clock pulse φV (φv1
~φv4 and these phases are set appropriately) is applied to the vertical transfer CCD 102.
The signal transferred to the final stage at high speed within the CD 102 is then transferred to the horizontal transfer CCD 104, where also the clock pulse for high-speed horizontal transfer consists of φH (φold to φH4), and these phases are appropriately adjusted. (setting), the charges are transferred at high speed within the horizontal transfer CCD 104 toward the output section. As a result, the output section of the horizontal transfer CCD 104 receives a video signal a in approximately 1/2H units as shown in (D).
occur sequentially.

When the transfer of the video signal is thus completed, the third clock pulse φT is applied to the transfer gate 103 as shown in (A). As a result, the charge accumulated in the photoelectric conversion element 101 is transferred to the vertical transfer C0DIO2, and the charge accumulated in the photoelectric conversion element 101 is transferred to the vertical transfer C0DIO2.
The charge of 01 is reset. Next, in the same manner as above, the high-speed clock pulse φV for transfer is again applied to the vertical transfer CCD.
Send unnecessary charge to 102 for a short time 1 For example, 1 as above
All charges are discharged from the vertical transfer CCD 102 within /1000 seconds as shown in (C). When the discharge is completed in this way, the fourth clock pulse φT (
A clock pulse (generated, for example, 1/1000 seconds after the third clock pulse φT) is applied to the transfer gate 103. As a result, the charges accumulated in the photoelectric conversion element 101 during the time between the third clock pulse φT and the fourth clock pulse φT are transferred to the vertical transfer CCD 102. After that, as described above, the above charges are transferred to the vertical transfer CCD 102 and the horizontal transfer CCD by high-speed transfer clock pulses φV and φH.
104 at high speed, and video signals of approximately 1/2H units are sequentially output as shown in (D).

As described above, high-speed imaging is performed twice within one field, and the horizontal transfer CCD 104 outputs two images a.
and b are output at high speed.

This output is then applied to memory 120 via amplifier 105. Among these, the video signal a is stored in the memory (A), for example.
121, and the video signal is stored in the memory (B), for example.
122.

The video signals a and b thus stored are read out from the memory, combined in an arbitrary format, and sequentially sent out as a video signal in IH units. It is assumed that these memory storage, readout 1 combination, etc. are performed by a signal (description will be omitted) applied to the control input terminal 125.

Next, an example of the operation of the memory 120 will be explained using the block diagram of FIG. 6 and the operation waveform diagram of FIG. 7.

The video signal sent from the amplifier 105 mentioned above is sent to the memory 12.
0 input terminal 601, and this video signal is applied to the input terminal 601 of the first
switch 607 and video signal processing circuit 602. The video signal processing circuit 602 includes a control circuit 60
A clock signal from 3 is input, and the video signal is subjected to digital processing such as analog-to-digital conversion (A/D conversion) and converted into a digital video signal. This digital video signal is output to second switching means 604. The second switching means 604 is connected to the horizontal transfer CCD 104.
The video signals at, b, , a, , bt, a, , b300 . The digital video signal created from 611 . b+
is signal 612. ax is the signal 6t3. bz is the signal 614.
aff is a signal 611, b3 is a signal 612. , , etc. are switched and transmitted in a repeating order. These are sequentially updated from memory 121 to
124 will be man-powered. Writing and reading are performed in the memories 121 to 124 based on write and read address signals 615 to 618 inputted from the control circuit 603.

The reading is performed using the video signal aI + bl r a1 for each group output from the horizontal transfer CCD 104.
+bZ, -- are read out in their entirety, or with appropriate thinning out.

The third switching means 605 receives the digital video signals 621 to 621 sequentially read out from the memories 121 to 124 as described above based on the switching signal inputted from the control circuit 603.
624 is selected and outputted from the third switching means 605. The third switching means 605 also uses a switching signal inputted from the control circuit 603, for example, the video signal a (
a, , a2+a3. -0) digital signal and the video signal b (bl, bt, bi,
, , ) are switched at a timing such that b is the main screen and a is inserted as a reduced sub-screen at the position of the second quadrant in the main screen, resulting in a video signal for one field. A digital video signal synthesized as follows is output. The digital video signal processing circuit 606 receives the clock signal from the control circuit 603, converts the digital video signal into an analog video signal by digital-to-analog conversion (D/A conversion), etc., and outputs the analog video signal.

Regarding writing and reading from the memories 121 to 124, reading is performed after each writing is completed, and the writing and reading operations to these memories will be explained with reference to FIG.

A in FIG. 7 is a result of digital processing of each group of video signals outputted by the horizontal transfer CGD 104, and shows digital video signals sequentially input to the memories 121 to 124. B in FIG. 7 is memory 121-1
Writing period (W) of the above digital video signal to 24
and memo U 121-124 readable period (R
) is a timing diagram illustrating.

The readable period R from the memory is approximately 1 field period as shown in FIG.
(1) If you want to obtain only + , bx , bz , , , ), you can obtain only the read signals of the memories 122 and 124 shown in B in FIG. 7 and send them sequentially as video signals of one field period. good. In addition, when combining the above two images a and b into one screen, B in Fig. 7
By controlling the length and timing of the readout period within the readable period R of each memory shown in FIG. For example, as shown in E in Figure 2, the first m lines of the video scanning line are output as the first half of the line as video a and the second half as video, and the next n lines after the scanning line are all video. Sent as The video signal thus obtained is applied to the next signal processing circuit 1.6 via the first switching means 607 shown in FIG. converted.

Note that the first switching means 607 is used when directly sending the signal applied to the input terminal 601 to the signal processing circuit 106 without performing the above-mentioned digital processing or memory processing. For example, when high-speed imaging is not performed, the video signal is directly applied to the signal processing circuit 106 via this path.

When the video signal obtained by combining the video signals a and b as described above is sent to the television from the output terminal 107 shown in FIG. 1, the screen will look like the one shown in FIG. Then, it is possible to separate the movement into two parts within one field and observe them, allowing for more detailed analysis.Figure 3 (a) shows a television screen in the case of conventional high-speed imaging, and one field Since it was only imaged once within the day, it was possible to capture a moment of rapid movement, but the more detailed movements are unknown.

Next, when the selector switch 109 is switched to high speed 3 or high speed 4, clock pulses are generated at a high speed so that faster transfer can be performed than at high speed 2, for example, 1/1.
000 seconds of ↑damage is performed three or four times in one field to perform high-speed imaging. In these cases,
The output of the COD is further added to the memory shown in Fig. 6, and the output of the COD is cyclically input to these memories so that the oldest write order is updated, and the readout is performed so that the readable period is one field. It will be done. By appropriately controlling these readouts using the same concept as above and reading and synthesizing video signals, for example, the image shown in Fig. 3 (C
A screen such as 1 or (d) can be obtained, and more detailed high-speed imaging becomes possible.

When the image signal obtained as described above is recorded in a recording device and played back in slow motion or still, there is an effect that even a fast-moving subject has less blur and the motion can be seen in resolution.

In the above embodiments, an interline type COD has been described, but the present invention can also be realized in a frame transfer type COD or other image sensor, and the same effects as in the above embodiments can be achieved.

Further, in the above description of the high-speed imaging state, the ti shadow corresponding to a shutter speed of 1/1000 second was described, but high-speed imaging can be realized by similar operations even in the case of other shutter speeds. Furthermore, in the case of the above-mentioned high speed of 2.3°4, we described an example of repeating imaging at the same shutter speed (1/1000 sec) within the l field, but these do not necessarily have to be the same shutter speed, but are different from each other. It may also be a combination of shutter speeds.

Furthermore, in the above embodiment, a plurality of video signals are combined to form one field video signal, but only one of these is read out from the memory and sent out as the same video signal as in the case of conventional high-speed imaging. In this case, the television screen will look like the one shown in FIG. 3(a). However, in this case, the screen can be displayed as B, C, or D in addition to A shown in Figure 3 (a), and if these are displayed in order, it is effective to break down and display the movement of the subject in detail. .

In addition, in the above explanation, an embodiment was described in which a plurality of video signals obtained within one field are combined via a memory and output as a single video signal, but a plurality of video signals different from standard television signals within one field are combined. It may be configured such that the video signal is recorded as it is in the recording device, and then restored to the regular video signal via the memory during playback.

〔Effect of the invention〕

As described above, according to the present invention, high-speed imaging is performed a plurality of times within one field period, or the plurality of imaging signals are stored in a memory, and one of them is read out from the memory. The structure is configured to output one field of regular video signals by combining one or more signals, which has the effect of allowing fast-moving subject images to be broken down into smaller pieces and viewed on the television screen. There is.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an imaging device according to an embodiment of the present invention;
Fig. 2 is a diagram for explaining the operation of this device, Fig. 3 is an explanatory diagram when the output of the imaging device of the above embodiment is displayed on a television screen, and Fig. 4 is a diagram showing a conventional imaging device. ,
FIG. 5 is a diagram for explaining its operation, FIG. 6 is a block diagram of the memory of the above embodiment, and FIG. 7 is an operation waveform diagram of the memory. 101 is a photoelectric conversion element, 102 is a vertical transfer element, 103
1 is a transfer gate, 104 is a horizontal transfer element, 108 is a drive pulse generation circuit, and 120 is a memory. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (2)

[Claims] (1) A photoelectric conversion element, a vertical transfer element that transfers charges in the vertical direction, a transfer gate that transfers the charges accumulated in the photoelectric conversion element to the vertical transfer element, and the vertical transfer element comprising a horizontal transfer element that horizontally transfers the charge output from the vertical transfer element and a drive pulse generation circuit that sends transfer clock pulses corresponding to each of the vertical and horizontal transfer elements and the transfer gate, During high-speed imaging, a plurality of (N) short time periods are arranged at specific intervals within one field period, and a transfer clock pulse is applied to the transfer gate during the short time periods to perform the photoelectric conversion. The imaging charge accumulated in the element is transferred to the vertical transfer element, and then this charge is applied to each of the vertical transfer element and the horizontal transfer element at a pulse frequency according to each of the short time periods. By applying a changed transfer clock pulse, the image signal is transferred in the vertical transfer element and the horizontal transfer element, and the image signal captured in the plurality of sections within one field period is transferred to the output terminal of the horizontal transfer element. An imaging device characterized in that the imaging device obtains images by sequentially outputting the images. (2) a photoelectric conversion element, a vertical transfer element that transfers imaged charges in the vertical direction, a transfer gate that transfers the charges accumulated in the photoelectric conversion element to the vertical transfer element, and a vertical transfer element; a horizontal transfer element that horizontally transfers charges output from the element; a drive pulse generation circuit that sends transfer clock pulses corresponding to each of the vertical and horizontal transfer elements and the transfer gate; and a memory for storing an imaging signal outputted from the transfer element based on the transferred charge, and during high-speed imaging, a plurality of (N) short time periods are stored at specific intervals within one field period. A transfer clock pulse is applied to the transfer gate during the short time period to transfer the imaging charge accumulated in the photoelectric conversion element to the vertical transfer element, and then this charge is transferred to the vertical transfer element and the horizontal transfer gate. Transfer is performed within the vertical transfer element and the horizontal transfer element by applying a transfer clock pulse whose pulse frequency is changed according to each of the short time periods to each of the transfer elements, and The plurality of imaging signals captured in the plurality of sections are sequentially outputted to an output end of the horizontal transfer element within one field period, and the outputs are stored in the memory, and the plurality of imaging signals are stored in the memory. What is claimed is: 1. An imaging device characterized in that an arbitrary section of the above is selected, synthesized, converted into an imaging signal corresponding to one field of a television signal, and transmitted.