JP3193019B2 - Recording and playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording / reproducing apparatus using a high-speed photographing apparatus capable of photographing at N times the normal speed.

[0002]

2. Description of the Related Art Conventionally, an imaging apparatus which enables high-speed photographing without changing the recording means has been proposed by the present applicant in Japanese Patent Application Laid-Open No. 1-51876.

However, the conventional circuit described above has a drawback that the horizontal transfer clock of the solid-state imaging device needs to be N times as large as the normal circuit, so that the circuit configuration becomes complicated and the power consumption of the horizontal drive circuit increases.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned points, and uses a high-speed photographing apparatus which enables N-times high-speed photographing without increasing the horizontal transfer clock by N times. A recording / reproducing device is provided.

Another object of the present invention is to provide a recording and reproducing apparatus for recording and reproducing a video signal photographed by the high-speed photographing apparatus to obtain a slow motion image.

[0006]

According to the present invention, there are provided M photoelectric conversion elements, a vertical transfer CCD for vertically transferring charges accumulated in the photoelectric conversion elements, and a charge transferred by the vertical transfer CCD. And L (L is an integer of 1 or more) horizontal transfer CCDs for transferring charges of one line in the horizontal direction during one horizontal scanning period, and are arranged in parallel with the horizontal transfer CCDs.
A solid-state image pickup device provided with a drain for sweeping out unnecessary charges from the horizontal transfer CCD via a control gate; and a read pulse supplied to the vertical transfer CCD to transfer the charges accumulated in the photoelectric conversion element to the vertical transfer CCD. And a vertical drive circuit for supplying a vertical transfer pulse during a horizontal blanking period to transfer the charge of one line to the horizontal transfer CCD, and transferring the charge transferred to the horizontal transfer CCD by a horizontal transfer clock. A horizontal drive circuit; and a signal processing circuit for processing the electric charge transferred from the horizontal transfer CCD and adding a synchronization signal thereto. The vertical drive circuit sends the read pulse to the vertical transfer CCD by one.
A normal mode in which the charge is supplied once to the field and the charge of the photoelectric conversion element is read out; and a high speed mode in which the vertical drive circuit supplies the readout pulse to the vertical transfer CCD N times in one field to read out the charge of the photoelectric conversion element. In the high-speed shooting mode, the vertical drive circuit supplies N vertical transfer pulses to the vertical transfer CCD every one horizontal blanking period to charge the N lines. The horizontal drive circuit transfers the charge of one line among the transferred charges to the camera processing circuit, and transfers the charge of (N-1) lines to the control gate. A high-speed imaging device that supplies an unnecessary-charge sweeping pulse to sweep the drain to the drain; Recording means for recording an image signal on a recording medium, driving means for driving the recording medium at a speed of 1 / N at the time of recording, and reproducing means for reproducing a 1 / N times slow-motion image from the recording medium; It is a recording / reproducing device including:

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a 240-line solid-state image sensor unit used in this embodiment. 1, 1,... Are M photodiodes for performing photoelectric conversion, 2, 2,. This vertical transfer CCD has a vertical drive circuit 3
Driven by The horizontal transfer CCD 4 is a horizontal drive circuit 5
Driven by Reference numeral 6 denotes a drain for discharging electric charges which is a feature of the present invention, and is arranged in parallel with the horizontal transfer CCD 4. Reference numeral 7 denotes a sweep control gate for controlling sweep from the horizontal transfer CCD 4.

The solid-state imaging device unit has 480 vertical pixels.
The number of lines is 240 because charges of two vertical pixels are mixed and read out when reading out charges on a CD.

Next, the operation of the solid-state imaging device unit will be described.

First, in the normal photographing mode, as shown in FIG. 2, the apparatus operates in the field accumulation mode. That is, a charge readout pulse is supplied from the vertical drive circuit 3 to the vertical transfer CCD 2 once per field, and the charge stored in the photodiode 1 is read out to the vertical transfer CCD 2. Then, the vertical transfer CCD 2 outputs 1H according to the vertical transfer pulse.
One line of charge is transferred to the horizontal transfer CCD 4 once (H is a horizontal scanning period). The horizontal transfer CCD 4 outputs charges for one line in a 1H period according to a horizontal transfer clock of a predetermined frequency of the horizontal drive circuit 5.

On the other hand, in the double high-speed photographing mode, as shown in FIG. 3, a charge reading pulse is supplied to the vertical transfer CCD 2 once every half field. Then, the vertical transfer CCD 2 transfers charges of two lines per 1H to the horizontal transfer CCD 4 by the vertical transfer pulse generated twice consecutively during one horizontal blanking period. The unnecessary control signal 7 is released by the supplied unnecessary charge sweeping pulse, and the control gate 7 is released, and the charge of the first one line of the continuous two lines is swept out to the drain 6, and the charge of the subsequent one line is normally transferred by the horizontal transfer CCD 4. The transfer is performed by the horizontal transfer clock having the same frequency as the mode. That is, an output for every other line is obtained from the horizontal transfer CCD 4.

Therefore, two images accumulated at different timings in one field period are obtained. However, since there are two screens of video signals that are continuous in the vertical direction during one field period, the reproduced image is a screen compressed in the vertical direction as shown in FIG.

FIG. 5 is a schematic block diagram of the apparatus of this embodiment. Reference numeral 8 denotes a timing generator for controlling the timing of the horizontal and vertical drive circuits. Reference numeral 9 denotes a signal processing for a normal camera and a synchronization signal having a normal cycle. This is a signal processing circuit to be added, and this output is supplied to the recording circuit.

On the other hand, as described above, the reproduced image as it is is compressed in the vertical direction, so that it is difficult to view the image when observing it with a viewfinder during photographing. For this reason, part of the output of the signal processing circuit 9 is
To enlarge in the vertical direction, and switch 11 in high-speed shooting mode.
This output is supplied to the viewfinder.

Next, an embodiment at the time of 4 × high-speed photographing will be described.

The solid-state imaging device unit used in this embodiment is the same as that shown in FIG. In this 4 × high-speed shooting mode, as shown in FIG. 6, only the upper left 1/4 area shown by oblique lines in the CCD output during normal imaging is taken out and used.

The driving of the CCD is performed as shown in FIG. That is, the charge readout pulse is supplied to the vertical transfer CCD 2 once every ４ field. The vertical transfer CCDs 2 are driven by vertical transfer pulses output one by one every 1 / 2H and 120 each during a horizontal blanking period every quarter field. Therefore, the charges for one line are transferred to the horizontal transfer CCD 4 in 1 / 2H. Since the horizontal transfer CCD 4 is driven by the same horizontal transfer clock as in the normal mode, when the transfer of the first half of one line is completed and the charge of the second half remains, the charge of the next line is transferred to the vertical transfer CCD. At this time, the charge in the latter half of one line is swept out to the drain 6 by an unnecessary charge sweeping pulse. Therefore, only the first half signal of one line is output from the horizontal transfer CCD 4. Then, the first half signal of the next line is continuously output.

Further, when the vertical transfer CCD finishes transferring 120 lines for 1/4 field, the remaining one is transferred by 120 vertical transfer pulses and unnecessary charge sweeping pulses.
Charges for 20 lines are swept out to the drain 6.

Therefore, the CCD output is as shown in FIG.
One screen is composed of eight images in which the image of the upper left quarter of the subject is compressed in half in the vertical direction. Here, the left and right images are images composed of odd lines and even lines on the same time axis.

FIG. 8 is a schematic block diagram of the apparatus of this embodiment. Reference numeral 12 denotes a rearranging circuit for rearranging the CCD output of FIG. 6a in the 4 × high-speed photographing mode as shown in FIG. This switch is switched in a high-speed shooting mode, and its output is supplied to a recording circuit.

On the other hand, reference numeral 14 denotes an enlargement circuit for enlarging the image by a factor of two in the horizontal and vertical directions in the 4 × high-speed photographing mode and supplying it to the viewfinder.

Next, the rearranging circuit 12 will be described. The rearrangement circuit 12 has eight memories a1, a
2, b1, b2, c1, c2, d1, d2 and a memory control circuit 120. Each memory is a memory for 1/8 screen, and eight areas A1 of the CCD output of FIG.
The signals of A2, B1, B2, C1, C2, D1, and D2 are stored correspondingly. That is, at the time of writing, FIG.
, The first フ ィ ー ル ド field is alternately written to the memories a1 and a2 every 毎 H, and the next フ ィ ー ル ド field is alternately written to the memories b1 and b2. Thereafter, the data is similarly written in all the memories.

At the time of reading, the first half field period is repeatedly read in the order of memories a1, b1, a2, and b2 in response to the read enable signal as shown in FIG. c1, d
1, c2, and d2 are read in this order. Therefore, an output as shown in FIG. 6B is obtained.

Next, another embodiment of 4 × high-speed photographing will be described.

As shown in FIG. 12, the solid-state imaging device unit used in this embodiment has two horizontal transfer CCDs 4 in parallel, and reads out signals of the same number of lines as the number of vertical pixels 480. That is, the resolution can be improved by reading data of all pixels without mixing charges of two vertical pixels. Regarding such a CCD, the present applicant has previously filed Japanese Patent Application No. Hei.
195).

The driving of the CCD is performed as shown in FIG. The difference from FIG. 7 is that two vertical transfer pulses are output every 1 / 2H, and 240 vertical transfer pulses are output during the horizontal blanking period every 1/4 field. This is a point that 240 pieces are output one by one and every quarter field. As a result, odd-numbered line signals of 1 to 239 are obtained at the CCD output 1 and signals of even-numbered lines of 2 to 240 are obtained at the same time.

In the above embodiment, an example of high-speed photographing of 2 × and 4 × has been described, but it goes without saying that high-speed photographing of other magnifications is also possible.

Next, FIG. 14 shows a recording / reproducing apparatus for obtaining a slow motion image from a high-speed image signal picked up by the image pickup apparatus. That is, the imaging output is recorded on the magnetic tape T via the recording circuit 15 and the recording / reproducing switch 16. At the time of reproduction, the magnetic tape T is intermittently driven at 1 / N times the speed at the time of recording. This gives the same signal as in FIG. 6b.
This signal is written to the frame memory 18 controlled by the memory control circuit 17. Then, by controlling the reading, an N-fold smooth slow-reproduced image that is enlarged by N times and processed on the time axis is obtained.

[0030]

As described above, according to the present invention, the horizontal transfer clock can perform high-speed shooting at N times the normal frequency at the same frequency as in the normal shooting mode, so that the power consumption of the horizontal drive circuit can be increased without increasing the power consumption. Slow motion reproduction can be realized with a simple circuit configuration.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a solid-state imaging device unit according to an embodiment of the present invention.

FIG. 2 is a time chart during normal shooting.

FIG. 3 is a time chart at the time of 2 × high-speed shooting.

FIG. 4 is a schematic diagram of a 2 × high-speed photographed image.

FIG. 5 is a block diagram in the present embodiment.

FIG. 6 is a schematic diagram during 4 × high-speed shooting.

FIG. 7 is a time chart at the time of 4 × high-speed shooting.

FIG. 8 is a block diagram according to another embodiment.

FIG. 9 is a diagram illustrating a rearrangement circuit;

FIG. 10 is a time chart of memory write control.

FIG. 11 is a time chart of memory read control.

FIG. 12 is a diagram illustrating a solid-state imaging device unit according to another embodiment of the present invention.

FIG. 13 is a time chart of 4 × high-speed shooting in another embodiment.

FIG. 14 is a block diagram of a recording / reproducing apparatus.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 photodiode 2 vertical transfer CCD 3 vertical drive circuit 4 horizontal transfer CCD 5 horizontal drive circuit 6 drain 7 sweep-out control gate 10 vertical enlargement circuit 12 rearrangement circuit 14 enlargement circuit 17 memory control circuit 18 frame memory

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-250291 (JP, A) JP-A-1-245773 (JP, A) JP-A-2-235485 (JP, A) JP-A 63-250 250289 (JP, A) JP-A-3-11885 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5/335, 5/765 H04N 5/91-5/956

Claims (1)

(57) [Claims] 1. M photoelectric conversion elements and said photoelectric conversion elements
Vertical transfer CCD that transfers the charges accumulated in the vertical direction
And one of the charges transferred by the vertical transfer CCD.
L, which transfers the charges for IN in the horizontal direction during one horizontal scanning period.
(L is an integer of 1 or more) horizontal transfer CCDs and the horizontal transfer CCDs
The CCD is arranged in parallel with the CCD and is controlled by the horizontal CCD.
A drain is provided to sweep out unnecessary charges through the control gate.
Read to the vertical transfer CCD
A pulse is supplied to charge the electric charges stored in the photoelectric conversion element.
Read to the vertical transfer CCD and horizontal blanking
During the period, supply the vertical transfer pulse and charge one line
A vertical drive circuit for transferring to the horizontal transfer CCD;
Transfer charges transferred to transfer CCD with horizontal transfer clock
And a horizontal drive circuit for transferring data from the horizontal transfer CCD.
Signal processing that adds the synchronization signal to the camera
And the vertical drive circuit includes the vertical transfer CC.
D, the read pulse is supplied once per field,
A normal mode for reading the charge of the photoelectric conversion element,
A vertical drive circuit sends the read pulse to the vertical transfer CCD.
Is supplied N times in one field, and the power of the photoelectric
High-speed shooting mode for reading the load
In the high-speed shooting mode, the vertical drive circuit
N transfer to the vertical transfer CCD every horizontal blanking period
To supply N lines of electric charge to the water.
To the flat transfer CCD, and the horizontal drive circuit
One line of the transferred charges is processed by the camera.
And transfer the charge for (N-1) lines
Supplying an unnecessary charge sweeping pulse to the control gate,
A high-speed imaging device that sweeps out to the drain; and N screens output from the high-speed imaging device in one field
Recording means for recording a video signal for a minute on a recording medium, driving means for driving the recording medium at a speed of 1 / N of the time of recording, and reproducing means for reproducing a 1 / N times slow-motion image from the recording medium. And a recording and reproducing apparatus comprising: