JP2638799B2 - Video playback device - Google Patents

Description

The present invention relates to a video playback device, and more specifically, to a video playback device.
The present invention relates to an apparatus for reproducing a recorded image signal having a plurality of small screens within one screen.

[Prior art and its problems] As a high-speed imaging apparatus using a video camera, there is a known direction in which both the vertical scanning frequency _fVS and the horizontal scanning frequency _fHS to the imaging unit are increased by the same magnification. But simply
If f _VS and f _HS are increased, the signal frequency is also increased. Therefore, the signal processing circuit of the camera must have a wide band, and if it is desired to record an output video signal, a wide band recording device is required. And a very expensive recording device is required. The monitoring device must also use a dedicated device for high speed.

By another application, the present applicant has presented a high-speed imaging device that outputs a video signal that can be used as a video recording device or a monitor device. The video signal has a plurality of small screens that are temporally continuous for one screen. According to the present invention, when a video signal of the signal format is reproduced from a recording medium, the video signal is displayed on a monitor device by utilizing a feature of high-speed shooting. The purpose is to present a playback device.

[Means for solving the problem]

A video reproducing apparatus according to the present invention is an apparatus for sequentially reproducing a video signal including a plurality of small screens temporally continuous in one field from a recording medium for a plurality of fields, and stores the reproduced signal from the recording medium in a memory. Is written, and a signal including individual small screens included in the sequentially reproduced video signals for a plurality of fields is sequentially read out from the memory as a video signal for one field at predetermined intervals.

[Action]

Although the recording signal of the recording medium includes a plurality of temporally consecutive small screens captured at high speed, the signal read from the recording medium is temporarily stored in a memory, and a signal portion corresponding to each small screen is stored in the memory. By sequentially reading data at predetermined time intervals, slow reproduction with a high information density in the time axis direction can be performed.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a schematic block diagram of a recording / reproducing apparatus as one embodiment of the present invention. In the following description, n and m are integers.

Before explaining the recording / reproducing apparatus of FIG. 1, a high-speed imaging apparatus for generating an image signal will be described in order to understand the format of a recorded image signal. FIG. 2 shows a configuration diagram of an interline type CCD image pickup device 10 serving as an image pickup device of the image pickup apparatus. In FIG. 2, reference numeral 12 denotes photoelectric conversion cells, which are arranged in a large number of rows and columns. 14 is a CCD for vertical transfer, 16 is a gate electrode, 18 is a CCD for horizontal transfer, 20 is a buffer amplifier, and 22 is an output terminal. Although this structure itself is publicly known, in the present embodiment, in the case of high-speed shooting, two horizontal transfer CCDs 18 are provided at 1 / m from the output terminal 22 side (m = 2 in the illustrated example, the center). Divide and use. Sign 1 on the CCD on the right
8A, and the left CCD is denoted by reference numeral 18B. Φ _V is a vertical transfer signal to the vertical transfer CCD 14, and Φ _H1 is a horizontal transfer CCD.
A horizontal shift signal Φ _H2 is a rightward shift horizontal transfer signal for 18A, a left shift horizontal shift signal for the horizontal transfer CCD 18B (right shift for normal speed shooting), and Φ _R is a gate pulse. In the case of high-speed imaging with respect to the vertical synchronization signal f _V of the video signal obtained by normal shooting speed in Figure 3 Φ
Shows the timing of _V and Φ _R. These Φ _V , Φ _R , Φ _H1 ,
Φ _{H2 and the} like are supplied from a synchronization signal generation circuit (SSG) 48 described later.

When shooting at a normal speed, the gate pulse [Phi _R is applied to the vertical blanking period in synchronization with the vertical synchronization signal f _V, the charge of each cell 12 is transferred to the vertical transfer CCD14 simultaneously, then the horizontal synchronizing signal By applying a vertical transfer pulse Φ _V synchronized with f _H , each horizontal line is transferred to the horizontal transfer CCD 18 by one horizontal line, and all of them are transferred to the right side by the horizontal transfer pulses Φ _H1 and Φ _H2 , so that the video signal S Is output.

Next, the operation in the high-speed shooting mode will be described. However, the case of four times the normal shooting speed (that is, n = 4) is taken as an example. In this case, the vertical scanning signal to the image sensor 10 is raised to four times the frequency of the normal case, and four gate pulses Φ _R are applied in one vertical period at the normal photographing speed as shown in FIG. . Gate pulse [Phi CC vertical transfer from cell 12 by _R
The charge transferred to D14 is a vertical transfer signal Φ _V (frequency f _Z )
Is sent to the horizontal transfer CCD 18 one horizontal line at a time.
The frequency of the vertical transfer signal [Phi _V at this time is set to 2 (= n / m) times the frequency of the vertical transfer signal during normal shooting as described above. A signal for a half horizontal line of the horizontal transfer CCD 18A is transmitted to the output terminal 22 by a horizontal transfer signal Φ _H1 .
On the other hand, the signal for 1/2 horizontal line of horizontal transfer CCD18B is
It is sent in the reverse direction by the horizontal transfer signal Φ _H2 and is discarded. Applying a high-speed vertical transfer signal [Phi _V of frequency f ₁ (> f ₂₎ at the stage of about 1/2 of the vertical scanning lines is read, performs sweeping charges remaining in the vertical transfer CCD 14. In this sweeping, the transfer direction by the horizontal transfer signal Φ _H1 may be reversed to the left in FIG. 2, or the signal from the output terminal 22 may be removed by a gate (not shown) or the like. After this sweep, is applied again gate pulse [Phi _R, cell 12
Is read.

Video signal obtained from the output terminal 22 of the image pickup device 10 by the high-speed imaging, as shown in FIG. 4 (a), 4 times the frequency normal television signal of the vertical synchronizing signal V _H, the horizontal synchronizing signal H The frequency of _H becomes a signal twice as large as a normal television signal. However, each output screen is a small screen having a horizontal resolution of 1/2 and a vertical resolution of 1/2 as compared to shooting at a normal speed. The small screens A, B, C and D in FIG. 4 (a) are temporally continuous. The high-speed photographing signal obtained in this manner has a horizontal synchronizing signal and a vertical synchronizing signal having the same frequency as that at the normal photographing speed by the configuration shown in FIG. 5, and has the image arrangement shown in FIG. Convert to a signal.

FIG. 5 shows an image pickup apparatus including this image pickup element. This apparatus will be described below. When the image pickup device 10 is performing a normal photographing operation, the switch 46 is connected to the N side, and the image pickup device
The video signal output from the ten output terminals 22 is supplied to the signal processing circuit 42 via the N-side terminal of the switch 46. on the other hand,
The video signal output from the output terminal 22 by the high-speed shooting operation of the image sensor 10 is converted into a digital signal by the A / D converter 30. Switch 32 is sequentially switched by a signal V _H indicating the vertical scanning period at the time of high-speed shooting generated from SSG48, sequential output signal of the A / D converter 30 every vertical scanning period at the time of high-speed imaging, 1 / The voltage is applied to m (two in the illustrated example) memories 34 and 36 having a capacity of n fields. The memories 34 and 36 may be of a random access type or a first-in first-out type. At the time of reading of the signal of the memory 34, performs a read alternately switch the output of the memory 34 and 36 in the switch 38 switched by the signal H _H in the horizontal scanning period during high-speed photographing supplied from SSG48, D / A converter 40
Is applied. The analog output of the D / A converter 40 is sent to the signal processing circuit 42 via the switch 46 that has been switched to the H side. In the circuit 42, a synchronizing signal of a normal television signal is added, and further, signal processing known in the field of a video camera is performed. Adopting a configuration in which signal processing is performed after D / A conversion has the advantage that color signal processing and the like can be shared with video signal processing at normal shooting speed. Of course, the necessary signal processing may be performed in the state of a digital signal.

The video signal thus obtained is a video signal in which a 2 × 2 small screen is included in one screen as shown in FIG. 4 (b).

The output signal of the signal processing circuit 42 is output from the terminal 44, but has a synchronizing signal of the same frequency as a normal television signal such as the NTSC system, so that it can be displayed on a normal monitor device and recorded on a normal VTR or the like. It is.

The device according to the invention shown in FIG.
It uses a helical scan VTR.

Via an input terminal to which the output terminal 44 of the imaging device is connected, a video signal obtained by normal shooting or high-speed shooting is FM-modulated a luminance signal as is well known in the above-described VTR in a recording signal process 54, A process of frequency-converting the carrier chrominance signal to the lower band is performed. The adder 56 multiplexes the video signal processed by the circuit 54 with an identification signal indicating whether the video signal is obtained by normal shooting or high-speed shooting. A circuit 52 generates this identification signal in response to a manual operation or an instruction from the imaging device. The identification signal is multiplexed with the video signal by a method such as multiplexing it as a pilot signal with a video signal or multiplexing it as a pulse signal during a vertical blanking period. The video signal in which the identification signal is multiplexed is supplied to a recording / reproducing unit 58, and is sequentially recorded on a magnetic tape running at a predetermined speed by a pair of rotary heads having different azimuths as is well known.

Hereinafter, the operation of reproducing the video signal by the recording / reproducing unit 58 will be described. It is assumed that the recorded video signal is due to normal shooting. In accordance with the identification signal separated by the identification signal separation circuit 62, the switch 66 is connected to the N side, and the video signal that has been subjected to the well-known signal processing by the reproduction signal processing circuit 60, that is, the luminance signal is FM demodulated and The video signal whose signal has been returned to the original band is supplied to the terminal 68 via the N-side terminal of the switch 66 and output to a monitor or the like. At this time, the capstan control circuit 64 controls the capstan (not shown) so that the magnetic tape is conveyed at the same speed as during recording according to the identification signal. This operation is exactly the same as the conventional VTR.

Next, an operation for reproducing a video signal captured at a high speed will be described. At this time, the video signal processed by the reproduction signal processing circuit 60 at the same time has one field composed of four small screens A, B, C and D as shown in FIG. 4 (b). In the illustrated device, the four small screens are converted into video signals that sequentially include one screen at a time in one field, and FIG.
It is intended to enable each small screen to be sequentially displayed at the position indicated by A in FIG. That is, a reproduction signal for one field (for four small screens) is obtained during a period corresponding to four fields of the reproduction video signal, and this is output as a four-field video signal.

The identification signal separated by the separation circuit 62 connects the switch 66 to the H side and causes the capstan control circuit 64 to cause the magnetic tape to run at 1/4 the speed at the time of recording. FIG. 6 shows the state of the trace of the rotary head on the magnetic tape at this time. The solid line in FIG. 6 indicates the boundary between the tracks, where TR1 is a plus azimuth track and TR2 is a minus azimuth track. T ₁ , T ₃ , T ₅ , and T ₇ shown by dashed lines are the center lines of the trace trajectory by the plus azimuth head, and T ₂ , T ₄ , T ₆ , and T ₈ shown by the broken lines are the trace trajectories by the minus azimuth head. It is the center line.

A video signal (a video signal including a plurality of small screens A, B, C, and D temporally continuous in one field) processed by the reproduction signal processing circuit 60 is input to an A / D converter 84, And input to the switch 86. The switch 86 is switched by a signal obtained by doubling the frequency of the horizontal synchronizing signal in the reproduction signal by the multiplier 76 composed of a PLL or the like, and the first half of each horizontal scanning line is stored in the 2 / n field memory 88 and the second half thereof. 2
/ n Supply to field memory 90, respectively. The horizontal synchronizing signal is obtained by separating the composite synchronizing signal separated by the synchronizing signal separating circuit 70 by the horizontal synchronizing circuit 72.

Reference numeral 80 denotes a write control circuit for the memories 88 and 90, which controls its write timing and write address.
And controls the read timing and the read address. FIG. 7 shows a timing chart of writing (W) and reading (R) of the memories 88 and 90. Period T ₁ through T ₈ of Figure 7 corresponds to the period in which the reproduced signal is obtained at Figure 6 trace the trajectory T ₁ through T _8.

Memory 88, 90 writes the video signal in the period T ₃ and T _6, this write period name, half the fourth view of (b) A, B, the second half video signals corresponding C, and D Are written respectively.
Also, by the operation of the switch 32 described above, A,
Video signals corresponding to B and D are written to C and the memory 90. In FIG. 7, A ₁ , B ₁ , C ₁ , D ₁ are included in the video signal recorded on the track TR ₁ , and A ₂ , B ₂ , C ₂ , D ₂ are included in the video signal recorded on the track TR 2. Are signals corresponding to small screens multiplexed in portions corresponding to small screens A, B, C and D in FIG. 4 (b). Note that after the trace trace trace T _8, becomes the same as T ₁ again relationship between the track and trace locus, the period corresponding to these, in the FIG. 7 T ₁ are denoted by the dash ', T ₂ ', .... Again, T ₃ ′,
Writing is performed at T ₆ ′.

Period T video signal written in the memory 88 in ₃ period T _3, T _4, T _5, each one small screen at a time to _{T 6 A 1, B 1,} C 1, D 1
Are read out in this order. This readout timing is set to a central half field period of each one-field period, and to a central half period of each horizontal scanning period. These memories 8
The outputs of 8, 90 are alternately output by the switch 92 every field period and supplied to the D / A converter 94. The write control circuit 80 and the read control circuit 82 operate on the above-mentioned reproduced horizontal synchronizing signal and the reproduced vertical synchronizing signal separated from the composite synchronizing signal by the vertical synchronizing circuit 74, respectively. The switch 92 is controlled by a control signal shown in FIG. 7 obtained by inputting a reproduction vertical synchronizing signal to the flip-flop 78.

As shown in FIG. 4 (c), the video signal (signal including individual small screens for one field) output from the D / A converter 94 is provided at the center of the output screen as each of the small screens A, B, C, and C. D is displayed sequentially, and a slow-motion image having information density in the time axis direction four times that of a normal image can be obtained.
The output of the A converter 94 is output from the terminal 68 via the H side of the switch 66.

Although two 2 / n field memories are provided in the embodiment shown in FIG. 1, if the memory is a random access memory,
Only one may be used. As a matter of course, it is also possible to perform conversion only by address control using a memory having a capacity of one field.

The portion of the background G in FIG. 4 (c) can be used for displaying various data such as time and field number. Although the image is somewhat coarse, the image may be enlarged and displayed. n so as to satisfy the relationship of n = m ^2, by selecting the m, the aspect ratio of each image can be the same as the image in the normal shooting speed. The case where n = 4 and m = 2 has been described, but any value can be used as long as n is a multiple of m.

〔The invention's effect〕

As can be easily understood from the above description, according to the present invention, slow reproduction of a high-speed photographed image can be realized with an extremely simple circuit configuration.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of one embodiment of the present invention, FIG. 2 is a configuration diagram of an example of an imaging device 10 of a high-speed imaging device, FIG. 3 is a timing chart of transfer signals of the imaging device of FIG. FIG. 4 is a diagram showing a screen display at each stage, FIG. 5 is a diagram showing a configuration diagram of an image pickup apparatus for processing the output of the image pickup device in FIG. 2, and FIG.
FIG. 7 is a diagram showing a trace locus on a magnetic tape by the apparatus of FIG. 1, and FIG. 7 is a timing chart of writing and reading to and from the memory in the apparatus of FIG. 58: recording / reproducing unit, 60: reproduced signal processing circuit, 62: identification signal separating circuit, 64: capstan control circuit, 68:
Output terminal, 84 A / D converter, 88, 90 Memory, 94
D / A converter

Claims (1)

(57) [Claims] 1. An apparatus for sequentially reproducing a video signal including a plurality of small screens temporally continuous from a field for a plurality of fields from a recording medium, wherein the reproduction signal from the recording medium is written to a memory and sequentially reproduced. A video reproducing apparatus characterized by sequentially reading out signals including individual small screens included in the plurality of fields of video signals from the memory at predetermined intervals as video signals for one field.