JP2675065B2 - High speed photography system - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a high-speed imaging system, for example, a technology effective when used in a high-speed imaging system capable of ultra-high-speed imaging.

[Prior Art] In nuclear fusion research and the like, a large-scale imaging system is used to record the phenomenon. For example, using the cameras and recording systems for the required number of lines, the output signals of the respective recording systems are combined to
I try to make one screen. As for the solid-state image sensor used in the above cameras, see Radio Technology Co., Ltd.
There is "CCD camera technology" issued on November 3, 1986.

[Problems to be solved by the invention]

In the shooting system for ultra-high-speed phenomenon as described above, it is necessary to have as many cameras and recording systems as the number of lines that make up the screen.
The scale of the system becomes large. Further, since there is variation in characteristics between the cameras, the variation appears as noise in the video signal for one image obtained by combining the output signals from the cameras.

An object of the present invention is to provide a high-speed image capturing system which realizes image capturing of high image quality ultra-high speed phenomenon with a simple configuration.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[Means for solving the problem]

The outline of a typical invention disclosed in the present application will be briefly described as follows. That is,
An output terminal is provided for every one or several rows, and output signals are simultaneously sent from each output terminal, and a video signal is formed from the output signal by a preamplifier and a signal processing circuit, and a plurality of video tape recorders for recording the video signal are provided. The respective video tape recorders are operated by a synchronization control circuit in time series to form a reproduced video signal for one screen.

(Operation)

According to the above-mentioned means, it is possible to shoot at an extremely high speed by the simultaneous output, and one solid-state image pickup element produces one image signal, so that the system can be simplified and the image quality can be improved.

〔Example〕

FIG. 1 shows a block diagram of an embodiment of an ultra-high-speed imaging system according to the present invention.

The solid-state image pickup device MID is based on the solid-state image pickup device of the MOS type or the CCD type as shown in the above document, and has output terminals L1 to Ln for each row.

From the upper output terminals L1 to Ln, the solid-state image sensor MID
The read signals of the respective rows are output in parallel according to the horizontal scanning operation of. As a result, it is possible to read one screen for the time required to read one row, and it is possible to perform ultra-high-speed shooting.

The output signals from the output terminals L1 to Ln are signal-amplified by the preamplifiers PA1 to PAn, respectively, but are not particularly limited, but through the low-pass filters LPF1 to LPFn, high frequencies such as switching noise included when the solid-state image sensor MID is read. The noise component is removed. The video signal of each row subjected to such signal processing is recorded in the storage units VTR1 to VTRn. This recording section VTR1 to VTRn
Is composed of, but not limited to, a video tape recorder. Instead of this, an A / D (analog / digital) conversion circuit may be provided in the input section for recording in a semiconductor memory device or the like.

The solid-state image sensor MID is driven by the drive circuit DRV. That is, clock pulses and the like required for the operation of the solid-state image sensor MID are supplied from the drive circuit DRV. Also,
In order to operate the recording units VTR1 to VTRn in synchronization with the operation of the solid-state image sensor MID, and the storage unit VTR1.
A synchronization control circuit SYNC is provided to synthesize and output the video signals of each row recorded in VTRn.

The synchronous control circuit SYNC exchanges signals with the drive circuit DRV, and is operated in synchronization during a read operation (photographing). When reproducing the video signals of each row recorded in the recording units VTR1 to VTRn, each recording unit VT
Depending on the recording operation as described above, only one row of video signals corresponding to each row (L1 to Ln) is recorded in R1 to VTRn. The synchronization control circuit SYNC first controls one line of the recording unit VTR1 (L1) in order to control the reproduction operation of the recording units VTR1 to VTRn in which the above-mentioned recording is performed and synthesize one screen. When the playback operation is performed and the playback is completed, the playback operation of the storage unit VTR1 is stopped (paused state), and one line (L
2) Perform the playback operation. Then, when the reproduction of this row (L2) is completed, the reproduction operation of the recording unit VTR2 is stopped (paused state). In this way, the recording unit VTR
The reproduction operation of 1 is switched in time series with the reproduction of one line as a unit, and the image signal Vout for one image is combined and created. Thereafter, the image signal for the next one image is also read out in the same manner as described above, with the recording unit VTR1 in the paused state again set to the reproduction state.

With this configuration, when the horizontal scanning operation of the solid-state imaging device MID is performed so as to obtain 30 screens (fields) per second as in a home VTR, it is equivalent to the reproduction operation of the recording unit as described above. Ultra high-speed shooting of 30 × n is possible in 1 second.

In this embodiment, since it is desired to use one solid-state image sensor, not only the system can be simplified, but also a large image quality can be obtained because there is no large variation in characteristics as in the case of using a plurality of caramers. You can Further, when a large number of cameras are arranged, the configuration of the screen is different due to the difference in the arrangement, so that the distortion of the shape of the subject combining the signals of the cameras occurs, but such a problem does not occur in this embodiment.

Further, in the present embodiment, the description has been given of the configuration in which the reproduction and the recording from VTR1 to VTRn are repeated, but only the recording is performed until the series of phenomena is finished, and thereafter, the reproduction is performed by switching VTR1 to VTRn in time series. It may be configured.

FIG. 2 shows a circuit diagram of a main part of an embodiment of the solid-state image pickup device MID according to the present invention. In the figure, 3 rows, 2
The circuits for the columns are exemplarily shown as a representative. Each circuit element in the figure is formed on a single semiconductor substrate such as single crystal silicon, although not particularly limited by a known semiconductor integrated circuit manufacturing technique.

One pixel cell is a photodiode D1 and a switch MOSFET (insulated gate type field effect transistor) whose gate is coupled to the chip select line CE, although not particularly limited thereto.
Q1 and a switch whose gate is engaged with horizontal scan line H1
It consists of a series circuit of MOSFET Q2. Other similar pixel cells (D) arranged in the same row (horizontal direction) as the pixel cell composed of the photodiode D1 and the switch MOSFETs Q1 and Q2.
2, Q2, Q4) etc. are connected to a horizontal signal line HS1 extending in the horizontal direction in the figure. Above horizontal signal line H
A chip select line corresponding thereto is arranged in parallel in S1. Pixel cells similar to the above are similarly combined in other rows.

The horizontal scanning lines H1 and H2 shown as an example are extended in the vertical direction in the figure, and the gates of the switch MOSFETs Q2, Q6, and Q10 of the pixel cells arranged in the same column have a common horizontal scanning line H1. Bind to. Pixel cells arranged in the other columns are also coupled to the corresponding horizontal scanning line H2 or the like as described above. The horizontal scanning lines H1, H2, etc. are selected by a horizontal scanning circuit HSR including a horizontal shift register or the like. Further, the chip select line CE is brought into a high-level selected state when the photographing is started by a selection circuit (not shown).

The horizontal signal lines HS1 to HS3 and the like corresponding to the above rows are provided with output terminals L1 to L3 and the like. As a result, by the selection operation of the horizontal scanning lines H1, H2 ... By the horizontal scanning circuit HSR, pixel signals are output in parallel via the horizontal signal lines HS1 to HS3 of each row.

In FIG. 2 described above, the chip select line CE may be omitted. Correspondingly, the switch MOSFETs Q1, Q3, etc. coupled to the chip select line CE can be omitted. As a result, the number of elements can be reduced, and if the number of pixels is the same, the aperture ratio of the photodiode D1 or the like can be increased.

Instead of providing one output terminal in one row as described above, one output terminal may be provided in two rows. For example, in the embodiment circuit of FIG. 2, the horizontal signal lines HS1 and HS2 are set as one set, and odd selection signals are supplied to the gates of the switch MOSFETs Q1, Q3, etc. corresponding to the horizontal signal line HS1 of the first row, An even selection signal is supplied to the gates of the switch MOSFETs Q5, Q7, etc. corresponding to the horizontal signal line HS2 in the second row. Then, the horizontal signal line HS1 is switched to 1 through a switch MOSFET which is switch-controlled by the odd selection signal.
A switch MOSFET connected to two output terminals L1 and the horizontal signal line HS2 is switch-controlled by the even selection signal.
Is connected to the one output terminal L1 through. In this configuration, since one output terminal is provided for two geometrical rows, the number of output terminals can be halved. Accordingly, the number of preamplifiers, low-pass filters, and recording units provided outside can be halved, so that the system can be simplified. However, since the read operation is to switch and output two rows from the output terminal, the number of fields (the number of screens) per unit time is halved.

The operational effects obtained from the above embodiment are as follows. That is, (1) by providing an output terminal for every one or several rows and sending output signals from each output terminal at the same time, an image signal for one screen can be obtained by reading out one or several rows. The effect that it becomes possible is obtained.

(2) According to the above (1), the signal of each row output from one solid-state image pickup device is recorded, and the recorded signals are sequentially reproduced in time series to synthesize one image signal. It is possible to obtain an effect that simplification and high quality of the reproduced video signal can be realized.

(3) According to the above (1), the signal of each row output from one solid-state image pickup device is recorded, and it is sequentially reproduced in time series to synthesize one image signal. It is possible to obtain such an effect that the distortion and the like can be eliminated.

Although the invention made by the inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various changes can be made without departing from the gist of the invention. Nor. For example, as described above, the solid-state image pickup device may use other solid-state image pickup device such as BBD (bucket relay device) in addition to the MOS type and CCD type.

Further, the preamplifier and the signal processing circuit provided outside can adopt various embodiments depending on the solid-state imaging device used. Then, in the case of a configuration in which an A / D conversion circuit is provided in the input section as a recording section and is stored as a digital signal, the digital signal is transferred to a buffer memory having a storage procedure for one screen, and the digital signal is transferred to the buffer memory.
It is possible to adopt various embodiments such as one that reads out and reproduces in time series in synchronization with a display operation of a display device such as a CRT.

INDUSTRIAL APPLICABILITY The present invention can be widely used as a high-speed shooting system used for ultra-high-speed shooting.

〔The invention's effect〕

The effects limited by the representative ones of the inventions disclosed in the present application will be briefly described as follows. That is, by providing an output terminal for every one to several rows and sending output signals from each output terminal simultaneously,
Since a video signal for one screen can be obtained by reading out a few lines, ultra-high-speed shooting becomes possible, and the system can be simplified and the quality of the reproduced video signal can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of an ultra-high-speed imaging system according to the present invention, and FIG. 2 is a circuit diagram of essential parts showing an embodiment of a solid-state imaging device according to the present invention. MID …… Solid-state image sensor, PA1 to PAn …… Preamplifier, LPF1
~ LPFn …… Low pass filter, VTR1 ～ VTRn …… Recording section,
DRV ... Drive circuit, SYNC ... Synchronous control circuit, HSR ... Horizontal scanning circuit

Claims (1)

(57) [Claims] 1. A two-dimensional solid-state image pickup device having an output terminal for each row and sending output signals from the output terminals simultaneously, a preamplifier connected to the output terminal for forming a video signal, and a signal processing circuit. And a plurality of video tape recorders for recording the above video signals, and each video tape recorder is operated in time series by a synchronization control circuit to form a reproduced video signal for one screen. A high-speed shooting system characterized by that.