JPH021456B2 - - Google Patents
Info
- Publication number
- JPH021456B2 JPH021456B2 JP57054766A JP5476682A JPH021456B2 JP H021456 B2 JPH021456 B2 JP H021456B2 JP 57054766 A JP57054766 A JP 57054766A JP 5476682 A JP5476682 A JP 5476682A JP H021456 B2 JPH021456 B2 JP H021456B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- circuit
- trigger
- signal
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000003990 capacitor Substances 0.000 claims description 29
- 230000004044 response Effects 0.000 claims description 19
- 238000009877 rendering Methods 0.000 claims description 7
- 230000007704 transition Effects 0.000 claims description 7
- 238000007599 discharging Methods 0.000 claims description 3
- 230000000630 rising effect Effects 0.000 claims description 3
- 230000003111 delayed effect Effects 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims 2
- 238000010168 coupling process Methods 0.000 claims 2
- 238000005859 coupling reaction Methods 0.000 claims 2
- 230000006870 function Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 230000008901 benefit Effects 0.000 description 3
- 230000001960 triggered effect Effects 0.000 description 3
- 230000001934 delay Effects 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000003044 adaptive effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001143 conditioned effect Effects 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
- H03K19/01735—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/256,590 US4431927A (en) | 1981-04-22 | 1981-04-22 | MOS Capacitive bootstrapping trigger circuit for a clock generator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57180226A JPS57180226A (en) | 1982-11-06 |
JPH021456B2 true JPH021456B2 (en, 2012) | 1990-01-11 |
Family
ID=22972815
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57054766A Granted JPS57180226A (en) | 1981-04-22 | 1982-04-01 | Trigger circuit in mos clock generator |
Country Status (3)
Country | Link |
---|---|
US (1) | US4431927A (en, 2012) |
JP (1) | JPS57180226A (en, 2012) |
GB (1) | GB2097210B (en, 2012) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4593279A (en) * | 1981-12-24 | 1986-06-03 | Texas Instruments Incorporated | Low power liquid crystal display driver circuit |
DE3217264A1 (de) * | 1982-05-07 | 1983-11-10 | Siemens AG, 1000 Berlin und 8000 München | Integrierter impulsformer |
US4521701A (en) * | 1982-09-16 | 1985-06-04 | Texas Instruments Incorporated | High-speed low-power delayed clock generator |
JPS5958920A (ja) * | 1982-09-28 | 1984-04-04 | Fujitsu Ltd | バツフア回路 |
EP0126788B1 (de) * | 1983-05-27 | 1987-06-03 | Deutsche ITT Industries GmbH | MOS-Bootstrap-Gegentaktstufe |
US4680488A (en) * | 1983-06-15 | 1987-07-14 | Nec Corporation | MOSFET-type driving circuit with capacitive bootstrapping for driving a large capacitive load at high speed |
DE3329093A1 (de) * | 1983-08-11 | 1985-02-28 | Siemens AG, 1000 Berlin und 8000 München | Dynamischer mos-schaltkreis |
JPS60224329A (ja) * | 1984-04-20 | 1985-11-08 | Sharp Corp | Mos集積回路素子の入力回路 |
US4642492A (en) * | 1984-10-25 | 1987-02-10 | Digital Equipment Corporation | Multiple phase clock buffer module with non-saturated pull-up transistor to avoid hot electron effects |
US4689496A (en) * | 1985-03-27 | 1987-08-25 | Ncr Corporation | Two clock boot circuit |
US4689505A (en) * | 1986-11-13 | 1987-08-25 | Microelectronics And Computer Technology Corporation | High speed bootstrapped CMOS driver |
US4952863A (en) * | 1989-12-20 | 1990-08-28 | International Business Machines Corporation | Voltage regulator with power boost system |
FR2703526B1 (fr) * | 1993-04-02 | 1995-05-19 | Gemplus Card Int | Circuit de déclenchement automatique. |
JP5106186B2 (ja) * | 2008-03-13 | 2012-12-26 | 三菱電機株式会社 | ドライバ回路 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3601637A (en) * | 1970-06-25 | 1971-08-24 | North American Rockwell | Minor clock generator using major clock signals |
US3714466A (en) * | 1971-12-22 | 1973-01-30 | North American Rockwell | Clamp circuit for bootstrap field effect transistor |
US3778784A (en) * | 1972-02-14 | 1973-12-11 | Intel Corp | Memory system incorporating a memory cell and timing means on a single semiconductor substrate |
JPS5937614B2 (ja) * | 1972-07-21 | 1984-09-11 | 株式会社日立製作所 | 絶縁ゲ−ト型トランジスタを用いたブ−トスラツプ回路 |
-
1981
- 1981-04-22 US US06/256,590 patent/US4431927A/en not_active Expired - Lifetime
-
1982
- 1982-03-16 GB GB8207568A patent/GB2097210B/en not_active Expired
- 1982-04-01 JP JP57054766A patent/JPS57180226A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
GB2097210B (en) | 1984-10-03 |
JPS57180226A (en) | 1982-11-06 |
US4431927A (en) | 1984-02-14 |
GB2097210A (en) | 1982-10-27 |
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