JPH02137508A - Gain control circuit - Google Patents

Abstract

PURPOSE:To attain excellent gain control by supplying a different offset current to a base of the 2nd transistor(TR) of plural control differential amplifiers or a current feedback circuit respectively and switching a signal in response to a control voltage level. CONSTITUTION:A luminance signal of an input Vin of a section to be controlled is led to a differential amplifier 21 via a capacitor Cin, a resistor R9 and a transistor(TR) Q22 to vary the mixture ratio between a current fed directly to a current mirror 26 and fed through an LPF 24. Moreover, the current shunting ratio to the current mirror 26 is decided by a differential amplifier 23 and a TR Q25 via a secondary differentiating circuit 15, a resistor R12 and a TR Q24. That is, a constant current source comprising the TR Q23 and a resistor R11 and a differential amplifier 22 makes tracking with an output DC component of the circuit 23. A different offset current is supplied to bases of TRs Q7,Q10 of diode connection in the differential amplifiers 12, 18 via resistors R4, R7. Thus, a selective luminance signal is obtained from the differential amplifiers 21-23 by varying a control voltage Vc and soft, standard and sharp picture quality is obtained accordingly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to improvement of a gain control circuit used in, for example, an image quality adjustment circuit of a liquid crystal television receiver.

(Prior Art) As is well known, a gain control circuit that suppresses gain fluctuations due to fluctuations in power supply voltage is used in, for example, image quality adjustment circuits of liquid crystal television receivers. FIG. 5 shows such a conventional gain control circuit. That is, in the control section, transistors Q1 to Q4 and resistors R1 to R3
constitutes the bias circuit 11, and the transistor Q2
A voltage obtained by dividing the power supply voltage Vcc at a predetermined ratio is generated at the emitter of the power supply voltage Vcc.

Now, if R1 - R2 and the emitter voltage of transistor Q2 is (1/2) Vcc, the current flowing through transistor Q8 is (1/2) Vcc/R3, and a current approximately equal to this current flows through transistor Q4. .

Further, transistors QB and Q7 constitute a differential circuit 12, and transistor Q7 is diode-connected. Furthermore, the collectors of transistors QB and Q7 are connected to transistors Q8. Current mirror circuit 13 consisting of Q9
The collector current of transistor QB is supplied to the collector and base of transistor Q7.

The base of transistor Q7 is connected to control terminal 14 via resistor R5. This control terminal 14 has
The ground level (0) generated by the variable resistor Re
A control voltage Vc up to the power supply voltage level (Vcc) is applied.

Here, when Vc-kVcc (0≦≦1) is set, the base potential of the transistor Q7 becomes approximately equal to (1/2)Vec because the transistors Q6 to Q9 are in a voltage follower format. For this reason,
The current IR5 flowing through the resistor R5 is lR5-(1/R5)
It becomes ikVcc-(1/2)Vccl.

And transistor Q8. If the current mirror ratio of Q9 is 1:1, the collector current 1c6 flowing through the transistor Q6 is Ice-(1/2)l(1/2R3)+(1/2R5)
−(k/R5)l Vcc, and the collector current Ic7 flowing through the transistor Q7
Ic7- (1/2)f(1/2R8)-(1/2R5
)+(k/R5)l Vcc.

By the way, the output voltage of the control section, the transistor QB
, Q7, the base-to-base voltage ΔV of each transistor QB, Q
Current flowing through 1c6.7. Since it is known that it is given by the ratio of Ic7, ΔV-VTρn (Ic7/Ic6) (where VT is the thermal voltage), and assuming R3-R5, ΔV-VTj)n fk/(1- k)), and there is no dependence on the power supply voltage Vcc.

Furthermore, the collector current Ice of transistors QB and Q7
, Ic7 is the ratio of transistors Q14 . Collector current I of Q15
Since we also know that c14 is equal to the ratio of Ic15, Ic14/Ic15- Ic7/Ice-/
(1-k), and since I clA + I cL5-1 in , the output current Io1. Io2 is 1o1-
1c14-k I in 1o2-1c15 - (1-k) Iln, and there is no dependence on the power supply voltage VCC.

Note that FIG. 6 shows the output current I with respect to the control voltage Vc.
o1. It shows the relationship of Io2.

Therefore, the gain drift is small and suitable for use in battery-powered equipment where the power supply voltage Vcc fluctuates widely.

Here, when the above gain control circuit is used in the image quality adjustment circuit of a television receiver, the controlled part is
As shown in FIG. 7, the output from the AC power supply Vin,
The luminance signal passed through the second-order differentiation circuit 15 and the luminance signal passed through the low-pass filter B made up of a capacitor C1 and a resistor R8 are transferred to the transistor QL8. The configuration is such that a differential circuit 17 consisting of transistor Q19 synthesizes the signals, and an output current 1 out is taken out from the collector of transistor Q27.

In this case, by operating the variable resistor Re and changing the output voltage ΔV of the control section, the synthesis ratio of the luminance signal passed through the second-order differentiator circuit 15 and the luminance signal passed through the low-pass filter 6 is controlled. . That is, when the image quality is soft, the transistor 018 is turned on, and when the image quality is sharp, the transistor Q19 is turned on.

By the way, since the image quality adjustment circuit shown in FIG. 7 combines the luminance signal passed through the quadratic differentiation circuit 15 and the luminance signal passed through the low-pass filter 1B, the high-frequency components of the luminance signal are cut off. This makes the system unsuitable for high image quality and wide bandwidth.

Therefore, recently, three types of signals have been developed: a video signal passed through a low-pass filter, a second-order differentiated video signal, and the original luminance signal.
The image quality is adjusted by controlling the operator. In this case, when the image quality is software, a signal that has passed through the Robuss filter is output, and when the image quality is sharp, a signal that is the sum of the normal luminance signal and the quadratic differentiated signal is output, and at the center of image quality control, only the normal luminance signal is output. Switching control is performed so that the output is output.

However, in such a conventional gain control circuit, it is not possible to perform the above-mentioned complex signal switching control by adjusting only one control voltage Vc, so in reality the circuit configuration becomes very complicated and is economically disadvantageous. It has become. Also,
Even if two sets of control units are provided, the control ranges will all overlap up to the ground level luminous source voltage Vcc level, so signal switching cannot be controlled by the control voltage Vc.

(Problems to be Solved by the Invention) As described above, in the conventional gain control circuit, the problem is that it is not possible to perform switching control of a plurality of signals □ according to the control voltage level within the variable range of the control voltage. have.

Therefore, the present invention has been made in consideration of the above circumstances, and an object thereof is to provide an extremely good gain control circuit that can perform switching control of a plurality of signals according to the control voltage level within the variable range of the control voltage. With the goal.

[Structure of the Invention] (Means for Solving the Problems) A gain control circuit according to the present invention includes a first transistor and a diode-connected second transistor whose emitters are commonly connected, and whose emitters are connected at a common connection point. A plurality of control differential circuits each having a current feedback circuit that feeds back the collector current of the first transistor to the collector of the second transistor; The emitters of the third and fourth transistors are connected in common so that the voltage difference between the base and emitter of the first and second transistors of the active circuit is the same as the base-emitter voltage difference, and the emitters of the third and fourth transistors are connected in common. Control obtained by dividing the power supply voltage at a predetermined ratio between the plurality of controlled differential circuits to which an external signal is supplied to a common connection point, and the bases of the second transistors of the plurality of control differential circuits. A control voltage applying means for applying a voltage in common, and an offset current supply means for supplying different offset currents to the bases of second transistors or current feedback circuits of the plurality of control differential circuits, and the control voltage applying means applies a voltage in common, This configuration is configured to selectively generate output signals from a plurality of controlled differential circuits in accordance with the control target.

(Function) According to the above configuration, different offset currents are supplied to the bases of the second transistors or the current feedback circuits of the plurality of control differential circuits, so that the offset currents are adjusted according to changes in the control voltage. Output signals can be selectively generated from a plurality of controlled differential circuits, that is, switching of a plurality of signals can be controlled according to the control voltage level.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. That is, as shown in FIG. 1, the power supply voltage VCC is applied to the collector-base common connection point of the transistor Q7 via an offset current setting resistor R4.

Further, the emitters of transistors QIO and Qll are commonly connected to form a differential circuit 18.
O is diode connected. Furthermore, transistor Q10. Each collector of QIL is connected to a transistor Q1
2. It is connected to a current mirror circuit 19 consisting of QlB, and the collector current of transistor Qll is supplied to the collector and base of transistor QIO.

The collector-base common connection point of the transistor QLO is connected via a resistor R6 to the connection point between the resistor R5 and the control terminal 14, and is grounded via an offset current setting resistor R7.

Further, the base of the transistor Qll is connected to the transistor Qll.
It is commonly connected to the base of 6. Furthermore, transistor Q10. At the common emitter connection point of Qll, there is a transistor Q3. A constant current is supplied by transistor Q5, which together with Q4 constitutes the current mirror circuit 20.

Next, the controlled portions are transistors Q14 . Q15 and transistor QIB,
It has three differential circuits 21 to 23 consisting of Q17 and transistors Q1g and Q19. Of these, transistor Q14. Q17. The bases of Q18 are commonly connected, and the common connection point is the transistor Q1.
Connected to the base common connection point of 3°Qll.

Further, the bases of transistors Q1B and Q19 are commonly connected, and their common connection point is connected to the collector-base common connection point of transistor QIO. Furthermore, the base of transistor Q15 is connected to resistor R4 and transistor Q
It is connected to the connection point with the collector-base common connection point of No. 7.

The collector of transistor Q14 is connected to the collector of transistor Q15 via a low-pass filter 24 made up of capacitor CI and resistor R8. Further, the collectors of transistors 01B and Q19 are connected to transistors Q20. It is connected to a current mirror circuit 25 consisting of transistor Q21, so that the collector current of transistor Q22 is added to the collector current of transistor Q1B.

Here, transistor Q14. Q15 and transistor Q1B, Q17 and transistor 018.
Each emitter common connection point with Q19 is a transistor Q22.to which a constant voltage VB is applied to the base. Q
23. Connected to the collector of Q24. These transistors Q22. Q23. Each emitter of Q24 is grounded via resistors RIO, R11, and R13, respectively.

Also, transistor Q22. Each emitter of Q24 is connected to a capacitor CI via resistors R9 and R12, respectively.
A luminance signal passed through N and a luminance signal passed through a second-order differentiation circuit 15 are supplied.

Further, the constant voltage VB is applied to the base of the transistor Q25. The emitter of this transistor Q25 is grounded via a resistor R14, and the collector is connected to a current mirror circuit 26 consisting of transistors Q2B and Q27.
The output current I out is taken out from the collector of transistor Q27.

In addition, the low-pass filter 24 and the transistor Q15
and the connection point with the collector of transistor Q16゜Q20
are connected to each other, and the connection point is connected to the connection point between the current mirror circuit 26 and the collector of the transistor Q25.

The operation of the above configuration will be described below. First, in the controlled section, the luminance signal outputted from the AC power supply Vin and passed through the capacitor CIN is converted into voltage and current by the resistor R9, passed through the transistor Q22, and then led to the differential circuit 21, where it is directly connected to the current mirror circuit. 26
The mixing ratio between the component transmitted to the current mirror circuit 26 and the component transmitted to the current mirror circuit 26 through the low-pass filter 24 is changed.

Further, the luminance signal outputted from the AC power source Vin and subjected to second order differentiation by the second order differentiator 15 is converted into voltage-current by the resistor R12, passed through the transistor Q24, and then converted into a current by the differential circuit 23 and the current mirror circuit 25. The shunt ratio to be transmitted to the mirror circuit 26 is determined. In other words, the constant current source made up of the transistor Q23 and the resistor R11 and the differential circuit 22 function to track the output DC component of the differential circuit 23.

Here, when the control voltage is Vc-0, transistor Q6 is on, Q7 is off, transistor QIO is off,
Since Qll is on, transistor Q14 is on, Q1
5 is turned off, and transistors Q17. When Qlli is on, transistors QlB and Q19 are turned off.

Therefore, only the luminance signal that has passed through the low-pass filter 24 is transmitted to the current mirror circuit 2B, and the output current 1 ou
t, and soft image quality can be obtained.

Also, when the control voltage Vc = (1/2)VcC, transistor Q6 is off and Q7 is on, transistor QIO is off and Qll is on, so transistor Q
14 is off, Q15 is on, and transistor Q 1
7. When Q1B is on, transistor Q16゜Ql'
l is turned off. At this time, only the collector current of the transistor Q15, that is, the normal luminance signal, is transmitted to the current mirror circuit 2B, resulting in an output current of 1 out, so that standard image quality can be obtained.

Furthermore, when the control voltage VcmVcc, the transistor Q
6 is off, Q7 is on, transistor QIO is on, and Qll is off, so transistor Q14 is off.
Q15 turns on, transistors Q17. 018 is off and transistors Q1B and Q19 are on.

At this time, transistor Q15. The combined collector current of Q19, that is, a signal obtained by combining the normal luminance signal and the second-order differentiated luminance signal, is transmitted to the current mirror circuit 26 and becomes an output current of 1 out, so that sharp image quality can be obtained.

According to the configuration of the above embodiment, two components constituting the control section
Each diode-connected transistor Q7. of the set of differential circuits 12.18. Since different offset currents are supplied to the base of Qll by the resistors R4 and R7, by changing the control voltage Vc, the luminance signals can be selectively output from the plurality of controlled differential circuits 21 to 28. Obtainable.

Here, the differential circuit 12 of the control section will be analyzed.

Now, set the emitter potential of transistor Q2 to (1/2)V.
cc and R3-R4, the current flowing through the transistor Q4 approximately flows through the resistor R4 and becomes Vc.
In the region ≧(1/2)Vcc, transistor QB is turned off and transistor Q7 is turned on. Also, Vc < (1/2)
In the Vcc (7) region, current flows through the resistor R5 to the variable resistor Re.

Therefore, the collector current 1c of transistors QB and Q7
[i, Ic7 is Ice-(1/2)[((1/2)-kl/R1V
ccIc7- (1/2) [(1/R8)-1(1/
2)-k)/R5]Vcc, and if R5-(1/2)R8, then 1 c7/
I ce -/l(1/2)-k) (0≦≦1/2).

Therefore, if the controlled section similar to the conventional example shown in FIG. 5 is controlled, the output current is 1o1. Io2 is Io1=2
kIin Io2- (1-2k) Iin, and there is no dependence on the power supply voltage Vcc. In this case, the control range is 0 to (1/2
) Vcc, and the output state at (1/2) Vcc is maintained in the range of (1/2) Vcc to Vce.

On the other hand, in the differential circuit 18 of the control section, the base of the diode-connected transistor QIO is connected to the ground terminal via the resistor R7, so the control range is from c to c in FIG.
As shown in d, it becomes (1/2)vcc-vcc. Output current in this case! of.

1o2 is 1o1= (2-2k) fin 1o2- (2 to -1) Iin becomes.

Next, FIGS. 3 and 4 respectively show other embodiments of the present invention, in which an offset current is supplied to a current mirror circuit 13 performing current feedback. That is, what is shown in FIG. 3 is the transistor Q2B.
, Q29 and the bias circuit 27 consisting of resistors R1 to R3, the emitter potential of the transistor Q28 becomes (
1/2) Vcc, the offset current supplied to the current mirror circuit 13 can be determined by the value of the resistor R3. In this case, the output characteristics when the controlled parts shown in FIG. 5 are connected are as shown in a and b in FIG. 2, and the output voltage Δ■ is (1/2) Vcc + VB
E (VBB is the voltage between the base and emitter of the transistor)
generated at a potential of

Furthermore, in the case shown in FIG. 4, not only the transistor Q7 but also the transistor Q6 are diode-connected, and the fifth
The output characteristics when the controlled parts shown in the figure are connected are as follows:
As shown in a and b in the figure, the output voltage ΔV is V c
Generated at a potential of c -V BE.

It should be noted that the present invention is not limited to the above-described embodiments, and can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] As detailed above, the present invention provides an extremely good gain control circuit that can perform switching control of a plurality of signals according to the control voltage level within the variable range of the control voltage. be able to.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram showing one embodiment of a gain control circuit according to the present invention, FIG. 2 is a characteristic diagram for explaining the same embodiment, and FIGS. FIG. 5 is a circuit configuration diagram showing a conventional gain control circuit, FIG. 6 is a characteristic diagram for explaining the conventional circuit, and FIG. 7 is a circuit configuration diagram showing the conventional circuit in a television receiver. FIG. 2 is a circuit configuration diagram showing a state in which the present invention is applied to an image quality adjustment circuit. 11...Bias circuit, 12...Differential circuit, 13.
...Current mirror circuit, 14...Control terminal, 15.
...Second-order differential circuit, 1B...Low-pass filter, 17
．． 18...Differential circuit, 19, 20...Current mirror circuit, 21-23...Differential circuit, 24...Low pass filter, 25.26...Current mirror circuit, 2
7...Bias circuit. Applicant's Representative Patent Attorney Takehiko Suzue

Claims (1)

[Claims] A first transistor and a diode-connected second transistor are connected in common at their emitters, and a current proportional to the power supply voltage is supplied to the common emitter connection point, and the first a plurality of control differential circuits each having a current feedback circuit that feeds back the collector current of the transistor to the collector of the second transistor; and base-emitter terminals of the first and second transistors of the control differential circuit; A plurality of controlled devices, each of which has a common emitter connection of third and fourth transistors connected such that the voltage difference between the bases and the base is the same as the voltage difference between the bases, and an external signal is supplied to the common emitter connection point. a differential circuit; and control voltage applying means for commonly applying a control voltage obtained by dividing a power supply voltage at a predetermined ratio to the bases of each second transistor of the plurality of control differential circuits; and offset current supply means for supplying different offset currents to the bases of the second transistors of the control differential circuits or the current feedback circuits, respectively, the plurality of controlled differential circuits according to changes in the control voltage. A gain control circuit configured to selectively generate an output signal from the circuit.