KR790001792B1 - Controllable gain signal amplifier - Google Patents

Abstract

A signal amplifier which could be used in TV receiver to control volume, tint and contrast function, was composed of a source of signals(20) (I), 1st signal amplification stage comprising a 1st transistor having a signal input electrode coupled to I and a main current conduction path including 2nd and 3rd electrodes, a source of quiescent operating current (30) copled to the 2nd electrode, output load cct. (36,38) coupled to the main conduction path of the 2nd transistor, and gain control means. The ccta. of this type were suitable for using mon olithic IC contruction techniques.

Description

Controllable Gain Signal Amplifier

Figure is a schematic schematic diagram showing a part of a chromaticity and lightness signal processing apparatus, which is a part suitable for being configured in an integrated circuit form as an embodiment of the present invention.

The present invention relates to a controllable gain electronic signal amplifier circuit, and more particularly to a circuit of a type suitable for using a monolithic integrated circuit construction technique.

Controllable gain signal amplifier circuits are widely used in television receivers to control functions such as volume, color saturation, color and contrast, for example.

When a part of such signal processing circuit is formed as an integrated circuit and the control element is composed of an external variable resistor, there is a problem of proper tracking or matching between integrated and non-integrated (separated) portions of the circuit. That is, tolerance variations of integrated circuit devices such as resistors and tolerance variations of external components are irrelevant. Thus, the amplifier gain (or attenuation) at each specific setting of the potentiometer is reproduced without the certainty necessary for mass production and the secondary centering required. Moreover, manufacturing tolerances associated with transistor characteristics (i.e., β) make it unpredictable for the minimum gain states for such circuits.

Another way to solve this problem is New Jersey, Leopold Albert Howard, U.S. Patent Nos. 3, 740, 462, and Allen Litoy Limburg, U.S. Patent No. 3, 649, 847, and C A3065 Type Television Integrated Circuits. The same method as the example mentioned in Linear Integrated Circuit Data Sheet No. 412 published by Thermovil R. Corp. was attempted.

In the C A3065 device, a differential amplifier current divider is used in combination with a direct current potentiometer to adjust the audio volume. In this type of circuit, relatively small changes in the gain control voltage (a few hundred mV) change the conduction state from one peak to another in the current splitter.

In the Limburg patent, several circuit devices are described that combine diodes and transistors in differential or current-divided form. The signal current is supplied to the junction of the emitter of the transistor and one electrode of the diode. The conductivity of the diode and the final division of the signal current between the diode and the transistor are controlled by a variable DC source comprising a variable resistor coupled to the diode's second electrode. This device shows several characteristics, as compared to a two-transistor current splitter of type C A3065. When applied, it shows additional characteristics such as the constant load of the signal current source, the setting of the variable resistance control and the linear relationship of the output signal current and the expected termination or zero gain state. For example, in the above-mentioned Howard patent, manual chroma signal gain control used in color television receivers is described. In this case, the zero current supply of the differential signal amplifier changes in accordance with the setting of the potentiometer. A potentiometer wiper is coupled to the diode via a follower transistor and a series resistor. The diode is coupled across the base-emitter junction of the amplifier's zero-current supply transistor in the form of a device's current mirror. In this case a linear relationship between the potentiometer setting and the amplifier signal gain is obtained.

However, the impedance characteristics of an amplifier transistor that includes reactive components such as capacitance can change as the potentiometer setting changes. This impedance variation is important when the controlled signal is a high frequency (3.58 MHz color carrier frequency). In particular, before and after the chroma signal processing apparatus of the color television receiver, this capacitance variation is a function of the gain control setting, resulting in unnecessary differential phase transition in the chroma signal. If this phase transition is applied to a point of the signal processing apparatus and a reference burst component other than a chroma signal causes a phase shift, an error occurs in the color of the reproduced picture.

In addition to the above reasons, a "tracking" may be provided between color saturation and contrast control, or a signal "picture" adjustment may be provided to keep the brightness and chromaticity drive signals within the desired portion of the useful control range.

The latter type of device is Jay. Arbins and Rain. second. Described in US Patent Application No. 588,690, filed on May 23, 1975 by Yokanis. As described by Arvins and Yokanis, this zero-gain state of contrast and saturation control can be easily predicted, so both contrast and saturation are monochromatic or supersaturated when the screen control is adjusted near the minimum gain state. It has no image and reaches the minimum value at the same time.

According to the invention, the controllable gain signal amplifier comprises at least first, second and third signal amplifiers coupled in differential signal amplification form. The first device applies an operating current to the other two devices and at least the first and second devices exhibit a current gain parameter β. The signal input stage, signal output stage and gain control stage are combined in the form of signal amplification. The gain control device is coupled to the gain control stage, has an output stage to which a selected portion of the voltage is applied, and includes a DC voltage source and a variable voltage divider coupled to both ends of the power supply. A voltage follower transistor exhibiting a current gain parameter similar to that of the first and second devices, is coupled with the gain control device and includes a combined output electrode direct current of the gain control stage. The device is also coupled in series from the input of the voltage divider to the input electrode of the follower transistor to change the gain control signal applied to the control stage to compensate for variations in current gain parameters in the nominal state.

Hereinafter, the present invention will be described in more detail with reference to the drawings.

Referring to the figure, a composite television signal containing at least brightness and chroma signal components is applied by the video signal processor 10. The brightness component is applied to the brightness processor 11, which includes a gain controllable amplifier of the type described in the above-mentioned Avins and Yokanis applications. The brightness signal gain of processor 11 is set by gain controller 18, which includes contrast-controlled potentiometer 13, “screen” controlled potentiometer 14, and light dependent variable resistor (LDR) arranged as described above. 15). The LDR15's enable and disable switch 16 is also provided. The positive control voltage applied to the wiper of the screen controller 14 is applied to one end of the contrast controller 13 through the PNP emitter transistor transistor 17, the other end of which is coupled to the positive supply voltage source (+ 11.7V).

The chroma signal component applied by the video signal processor 10 is coupled to the first chroma signal processor 20. The output is coupled to terminal 3 of the second chroma signal processing circuit 22.

In a color television receiver, a suitable first color processor 20 is constructed by a commercially available R.C.Coporsion C A3126 integrated circuit and its components. The second chromaticity processing circuit 22, which can be configured in an integrated circuit form, includes an appropriate chromaticity signal demodulation circuit (not shown) in addition to the gain controllable amplifier described below.

The illustrated amplifier includes a first transistor having a signal input (base) electrode coupled to terminal 3 by a resistor 26. The main current conduction path (collector-emitter) of transistor 24 is coupled to another resistor 30 through reduction resistor 28, which is coupled to a reference or ground potential via terminal 30, terminal 5. Resistor 30 coupled with an external voltage source (+11.7 V) coupled between ground stage 5 and B + supply stage 12 provides a zero operating current source for transistor 24, with the remainder of the amplifier described below.

A current divider circuit consisting of a second transistor 32 and a semiconductor rectifier device or diode 34 is coupled to the collector of transistor 24. The base-emitter junction and transistor 34 in transistor 32 are polarized in the same direction with respect to the flow of collector current in transistor 24. Diode 34 is fabricated as a transistor, such as transistor 32, except that the collector is shorted with the base. The conductive characteristics of these two devices are actually matched.

The output load circuit shown in series connection resistors 36 and 38 is coupled between the collector of transistor 32 and the operating power supply, the details of which will be described below. The amplified chroma output signal is applied to output stage 40 to be coupled to a demodulator circuit (not shown) accordingly.

The signal gain associated with the cascode coupling of transistors 24 and 32 is controlled by a potentiometer or variable voltage divider 42 coupled to the signal processing circuit 22 between the B + source and the ground terminal. Resistor 42 is fed back to ground through end limit resistor 44 and gain control circuit 18, as shown. The wiper arm of potentiometer 42 is DC coupled via resistor 19 and terminal 2 to the base of third transistor 46 in circuit 22. Resistor 19 serves to reduce the β fluctuation effect of transistors included in circuit 22 at the break point of the current splitter. Direct control current is applied to diode 34 at the emitter of transistor 46 through series resistor 52. The signal bypass circuit comprising capacitance 54 is coupled to ground at terminal 4 and terminal 4 is coupled to the junction of resistor 52 and diode 34 in circuit 22.

The bias potential and current are applied to the amplifier device described above by a plurality of voltage divider circuits 56 connected between terminals 12 (B +) and 5 (ground). In particular, the base bias is applied to the first transistor 24 through the resistor 58 and the follower transistor 60 by a voltage divider consisting of resistors 62, 64, 66 and compensation diodes 68, 70. The base of the follower transistor 60 is coupled to the junction of resistors 64 and 66. The base bias voltage is applied to transistor 32 by a second follower transistor 72 where the base of transistor 72 is coupled to the junction of resistors 62 and 64. (Eg about V _be higher than the base of transistor 60). The appropriate B + (collector supply) voltage is applied to transistors 32 and 72 by third follower transistor 74. The base of transistor 74 is coupled to the junction of distribution resistors 76 and 78 and its series coupling point is coupled across the zener diode 80. Current is applied to the zener diode 80 from supply stage 12 via resistor 80 and diode 86.

A second distributor consisting of resistors 88 and 90 is coupled across the zener diode 80. The junction of resistors 88 and 90 is coupled to a follower transistor 92 arranged to apply an operating collector voltage to transistor 60.

The amplifier includes an amplifier current divider type as described above in addition to providing an antiphase output signal at terminal 41. That is, current source resistor 30 is coupled to emitter-collector path of transistor 25 through resistor 29, transistors 24 and 25, which are differential amplifiers. The collector of transistor 25 is coupled to a second current divider consisting of transistor 33 and diode 35. Series connection load resistors 37 and 39 are coupled to the collector of transistor 33 and output 41 is applied to the junction of resistors 37 and 39. The same electrode (ie anode) of diodes 35 and 34 is commonly connected to resistor 52. In addition, the bases of transistors 32 and 33 are commonly coupled to the bias voltage applied to the emitter of the follow transistor 72.

The base of transistor 25 is coupled to the emitter of follower transistor 60 by a resistor 59 equal to the value of resistor 58. Resistor 94 is coupled to terminal 5 (ground) at the emitter of transistor 60.

Ignoring the gain control circuit 18 and the resistor 19, the following describes the operating parameters that correspond to the component values shown in the figure and correspond to the B + voltage supply at +11.7 volts. In this case, for example, a nominal operating current of about 1.2 mA is provided through resistor 30. Without an input signal, this current is divided evenly between equally biased transistors 24 and 25. If gain control adjustment potentiometer 42 is set to one limit (connected to resistor 44), component values are arranged such that transistor 46 is effectively shut off and no current flows in resistor 52 and diodes 34 and 35. In this case, neglecting the small difference between the collector and emitter current of the NPN transistor, the collector currents of transistors 24 and 25 flow into transistors 32 and 33, respectively. Transistors 32 and 33 form cascode signal amplifiers with their associated transistors 24 and 25 and operate in a common base form. This device provides a very desirable effect of low collector-base feedback capacitance and there is no practical variation in the phase transition of the signal at outputs 40 and 41 as potentiometer 42 changes. According to this setting of potentiometer 42, half of the zero current from resistor 30 flows into each load circuit and provides the maximum gain for the signal applied at power source 20.

As the wiper arm of potential difference 42 moves to the B + end, transistor 46 begins to become a conductive state. Transistor 46 becomes conductive when the voltage at the base of transistor 46 approaches the bias voltage applied to the bases of transistors 32 and 33 of the current divider. By selecting the circuit parameters, when the potentiometer 42 is set to approximately B +, both diodes 34 and 35 are arranged to conduct the zero operating current applied through the resistor 30, so that the transistors 32 and 33 are blocked to output signals to the terminals 40 and 41. Do not apply When the wiper is at the B + end of potentiometer 42, it is desirable to provide maximum attenuation to reduce the likelihood of difficulty or dead spots in circuit operation. Therefore, the product of the total current through the resistor 30 (approximately 1.2 mA) and the resistance value is slightly larger than the base-emitter voltage (V _be ) of transistor B + voltage-transistor 46-the base bias voltage values of transistors 32 and 33 (about several hundred mV). The value of resistor 52 should be determined.

If the potentiometer 42 is set to an intermediate level with the interruption of the transistors 32 and 33 or the interruption of the diodes 34 and 35, the voltage gain of the amplifier described above is varied in a linear manner with respect to the rotation of the potentiometer 42.

For the circuit described above, the relationship between the gain weir circuit 18 and the importance of the resistor 19 should be taken into account.

When adjusting the gain control circuit 18, the switch 16 is placed in the position shown according to the manual setting of the screen characteristics. The screen controller 14 is set to its lowest range (ground potential), and the contrast controller 13 is adjusted to provide the desired maximum brightness signal gain (contrast). At this time, the color saturation controller 42 is adjusted to have a sufficient degree of color saturation. After that, as the display controller 14 is adjusted to the maximum range (11.7 volts), brightness and chromaticity are simultaneously adjusted to zero level in the same proportion. Switching switch 16 to a different position causes LDR15 to enter the circuit, causing color saturation and contrast to respond to an ambient light condition as described in the Arvins and Yokanis patent applications.

In order to make the selected setting of potentiometer 14, it is desirable to have both brightness and chroma signal gain zero. However, the breakpoints associated with the chroma signal amplifiers shown are included. For example, with transistors 24 and 25 showing relatively low β (30-40), the base-emitter voltage drop is greater than when transistor β is large (150-180) and the current flowing through resistor 30 is small. Since the low β transistor requires a larger base current to generate a given emitter current, this low β device causes a low current to flow in resistor 30 due to the large voltage drop across resistors 58 and 59.

As such, when a low β transistor is included in the circuit, transistors 32 and 33 are cut off at the control voltage input less than the nominal cutoff value (11.7 volts). However, brightness processor 11 is expected to provide a brightness signal gain until potentiometer 14 is adjusted to its endpoint. In this case, the screen controller 14 reduces the chroma gain faster than the brightness gain, thus providing a relatively unsaturated screen for a constant setting of the controller 14. Resistor 19 in the base circuit of transistor 46 eliminates this undesirable effect.

When each of transistors 24, 25, and 46 is a high β transistor, a relatively low base current flows through resistor 19 and the voltage at the wiper of color controller 42 is unattenuated to the base of transistor 46. If transistors 46, 24 and 25 are low β devices, the base current flowing through resistor 19 drops the coupled voltage from the wiper of controller 42 to the base of transistor 46. This drop occurs in the proper direction to provide the expected small current interruption in transistors 32 and 33 when the wiper of controller 42 is at or near 11.7 volts. The value of resistor 19 is chosen to be applied as desired within the effective breaking voltage.

If circuit 22 is configured as monolithic, then a given wafer of such a circuit includes multiple transistors all having the same β characteristics.

The cascode connections of transistors 24, 32 and 25, 33 provide good response in the frequency range of the nominal color signal (2-4 MHz). Moreover, this circuit provides the desirable characteristics of low differential phase transition as the setting of potentiometer 42 varies. The coupling impedance of diode 34 and transistor 32 or the coupling impedance of diode 35 and transistor 33 is constant as potentiometer 42 changes.

The maximum gain state (potentiometers 14 and 42 wipers connected to ground) is determined by selecting the resistance value of the break resistor 44 relative to the total resistance of the potentiometer 42, so the minimum potentiometer output voltage is approximately equal to the base bias voltage of transistors 32 and 33. .

Because of the symmetry of the load circuits associated with transistors 24 and 25, a single control potentiometer 42 provides the same effect on the output at terminals 40 and 41. The resulting gain-controlled push-pull output signal is then preferably applied to a demodulation circuit (not shown).

In addition to the user-activated saturation control, a control current applied by the automatic control circuit can be coupled to terminal 4 to vary the signal gain. For example, it is desirable to bias the chroma signal amplifier to shut off when low luminance image information appears in an accessory brightness channel (not shown) of the color television receiver. In this case, a sufficient direct current is applied to terminal 4 to bias diodes 34 and 35 on and also to bias transistors 32 and 35 off, resulting in chroma "noise" on the low luminance screen. To reduce that.

Modifications and additions to the illustrated devices can be made without departing from the scope of the present invention. For example, a PNP follower can be inserted into the base of potentiometer 42 and transistor 46 to improve the temperature characteristics of the control device. In addition, the signal bypass capacitor 54 connected to terminal 4 can be resonated in series at the chroma frequency to reduce the effective impedance to ground. As described above, the resistor 19 prevents the case where the beta of the transistor can be controlled.

Claims (1)

As described above and shown in the figures, the first transistor 24 and the second transistor having a signal input electrode coupled to the signal source 20 by amplifying the signal at the signal source and excited by a DC voltage source. And a first signal amplifying stage including a main current conduction path including third electrodes, and a zero operating current source 30 coupled to the second electrode. A first semiconductor rectifier device (34) and a second transistor (32) having a main charge conductive path coupled to said third electrode; An output load circuit (36, 38) coupled to the main current conductive path of the second transistor (32); Variable voltage divider 42 directly connected to the first rectifier device 34 and coupled across a direct current voltage source B + for varying the current flow through the first rectifier 34 and the second transistor 32. A gain control device (42, 44, 46, 52) having an output terminal with a selected portion of said voltage; And a third transistor 46 having a base electrode directly connected to the output terminal and the emitter electrode, the third transistor 46 being directly connected between the output terminal and the first rectifier device 34 for applying variable DC to the device. A controllable gain signal amplifier characterized by coupling devices (19, 46, 52) comprising resistors (19, 52).

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