JPH02117215A - Duplex clock switching circuit - Google Patents

Abstract

PURPOSE:To realize an add-on type switching circuit by providing an auxiliary circuit module additionally only in case of need. CONSTITUTION:A level change circuit 7 keeps a module recognition signal 60 at an H level when the auxiliary circuit module 2 is turned off even when a main clock signal 10 is interrupted, therefore, an OR circuit 5 outputs the H level to a clock switching signal 50, and a selector circuit 4 continues to output the signal 10 to an output clock signal 40. Next, when the module 2 is provided additionally, a clock monitoring circuit 3 outputs an L level to a clock interruption signal 30 when the signal 10 is interrupted. The signal 60 goes to the L level by a setting circuit 8, and the circuit 5 outputs the L level to the clock switching signal 50. The circuit 4 outputs an auxiliary clock signal 20 from an auxiliary clock signal generation circuit 6 to the signal 40 by the signal 50, and performs switching from the signal 10 to the signal 20. In such a manner since the module 2 can function only when it is provided additionally on a main circuit module 1, a duplex clock switching circuit can easily be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a duplex clock switching circuit that compensates for disconnection of a main clock signal by switching to an auxiliary clock signal.

[Problem to be solved by the invention]

In this type of duplex clock switching circuit, the main circuit module and the auxiliary circuit module are separated into two modules, and the auxiliary circuit module is added only when clock duplication is necessary, and the main clock signal is An add-on type duplex clock switching circuit that switches the clock signal to an auxiliary clock signal to complete one cycle has not yet been developed.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an add-on dual clock switching circuit.

[Means to solve the problem]

The present invention is a duplex clock switching circuit comprising a main circuit module and an auxiliary circuit module that can be added to the main circuit module only when duplication of clocks is necessary, the main circuit module comprising: A clock monitoring circuit receives the main clock signal as input, monitors it, and outputs a clock disconnection signal, receives the aforementioned lock disconnection signal and the auxiliary circuit module recognition signal as input, takes the logical sum of these input signals, and outputs it as a clock switching signal. an OR circuit, which inputs the main clock signal, the auxiliary clock signal, and the clock switching signal, switches between the main clock signal and the auxiliary clock signal based on the level of the clock switching signal, and outputs the switched signal as an output clock signal. the auxiliary circuit module includes an auxiliary clock generation circuit that generates the auxiliary clock signal, and a level change circuit that changes the level of the auxiliary circuit module recognition signal; and a level setting circuit for setting the level of the auxiliary clock signal, and when the auxiliary circuit module is added, the main clock signal is switched to the auxiliary clock signal to supplement the disconnection of the main clock signal.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram illustrating one embodiment of the present invention. This duplex clock switching circuit is the main circuit module l.
and an auxiliary circuit module 2.

The auxiliary circuit module 2 can be added only when duplication is necessary, and can be separated from the main circuit module 1 at other times.

The main circuit module 1 includes a clock monitoring circuit 3, a selector circuit 4. An OR circuit 5 and a level change circuit 7 are built-in.

The clock monitoring circuit 3 monitors the main clock signal IO,
When the main clock signal 10 is disconnected, an "L" level is output as the clock disconnection signal 30.

The level change circuit 7 sets the auxiliary circuit module recognition signal 60 to aHn level when the auxiliary circuit module 2 is disconnected. In this embodiment, this level change circuit is composed of a pull-up circuit.

The OR circuit 5 receives the clock disconnection signal 30 and the auxiliary circuit module recognition signal 60 as inputs, takes the logical sum of these input signals, and outputs the clock switching signal 50.

The selector circuit 4 outputs the main clock signal 10 as the output clock signal 40 when the clock switching signal 50 is at the "H" level, and outputs the main clock signal 10 from the added auxiliary circuit module 2 when the clock switching signal 50 is at the "L" level. The auxiliary clock signal 20 of the output clock signal 40 is outputted as the output clock signal 40 .

On the other hand, the auxiliary circuit module 2 includes an auxiliary clock generation circuit 6 and an "L" level setting circuit 8. In this embodiment, this "L" level setting circuit is constituted by a grounding circuit.

Auxiliary clock generation circuit 6 generates an auxiliary clock signal 20.

The "L" level setting circuit 8 sets the auxiliary circuit module recognition signal 60 to the "L" level. Therefore, when the auxiliary circuit module 2 is disconnected, the auxiliary circuit module recognition signal 60 is held at the "I" level, and when the auxiliary circuit module 2 is added, the auxiliary circuit module recognition signal 60 is held at the "L" level. held at the level.

Next, the operation of this embodiment will be explained.

First, a case where the auxiliary circuit module 2 is added will be explained. When the main clock signal 10 is disconnected, the clock monitoring circuit 3 outputs the clock disconnection signal 30 at the "L" level. Since the auxiliary circuit module recognition signal 60 is set to the II L n level by the "L" level setting circuit 8 due to the addition of the auxiliary circuit module 2, the OR circuit 5 outputs the "L" level to the clock switching signal 50.

The selector circuit 4 outputs the auxiliary clock signal 20 output from the auxiliary clock signal generation circuit 6 as the output clock signal 40 in response to the "L" level of the clock switching signal 50,
The main clock signal 10 is switched to the auxiliary clock signal 20.

On the other hand, when the auxiliary circuit module 2 is disconnected, even if the main clock signal 10 is disconnected, the level change circuit 7 sets the auxiliary circuit module recognition signal 60 to "H" level, so the OR circuit 5 is a clock switching signal 50
The selector circuit 4 continues to output the disconnected main clock signal 10 as the output clock signal 40.

As described above, according to this embodiment, the main circuit module 1 and the auxiliary circuit module 2 are configured separately, and when the auxiliary circuit module 2 is added to the main circuit module 1, duplication is possible. It can function as a clock switching circuit.

〔Effect of the invention〕

As explained above, according to the present invention, by adding an auxiliary circuit module only when necessary, it is possible to easily realize an expandable duplex clock switching circuit that switches clock signal interruption to an auxiliary clock signal to supplement it. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a dual clock switching circuit which is an embodiment of the present invention. l... Main circuit module 2... Auxiliary circuit module 3... Clock monitoring circuit 4... Selector circuit 5... OR circuit 6... Auxiliary clock generation circuit 7... Level change circuit 8... "1," Level setting circuit 10...
Main clock signal 20... Auxiliary clock signal 30... Clock Ikfr signal 40...
Output clock signal 50... Clock switching signal 60... Auxiliary circuit module recognition signal Agent Patent attorney Yoshiyuki Iwasa

Claims (1)

[Claims] (1) A duplex clock switching circuit consisting of a main circuit module and an auxiliary circuit module that can be added to the main circuit module only when duplication of clocks is required, wherein the main circuit module is a main circuit module. a clock monitoring circuit that receives a clock signal as an input, monitors it, and outputs a clock disconnection signal; and a logical sum that receives the clock disconnection signal and the auxiliary circuit module recognition signal as input, and performs a logical sum of these input signals and outputs the result as a clock switching signal. a selector circuit that receives the main clock signal, the auxiliary clock signal, and the clock switching signal as input, switches between the main clock signal and the auxiliary clock signal based on the level of the clock switching signal, and outputs the switched signal as an output clock signal. and a level change circuit that changes the level of the auxiliary circuit module recognition signal, the auxiliary circuit module has an auxiliary clock generation circuit that generates the auxiliary clock signal, and a level change circuit that changes the level of the auxiliary circuit module recognition signal. and a level setting circuit for setting the auxiliary clock signal, wherein when the auxiliary circuit module is added, the duplex clock switching circuit is characterized in that when the auxiliary circuit module is added, the disconnection of the main clock signal is switched to the auxiliary clock signal to compensate for the disconnection of the main clock signal.