JPH0210773A - Semiconductor device - Google Patents

Abstract

PURPOSE:To seek to improve reliability by putting a gate electrode, through iron oxide excellent in quality, on a drain region in low concentration. CONSTITUTION:A field oxide film 7 formed of a thermal oxide film is provided above a P-type silicon semiconductor 1, and a source region 3 and a drain region are provided on the surface of the lower substrate 1. A gate oxide film 9 is provided at the inside of the film 7 where a hole is opened beforehand by etching. A gate electrode 10 is provided on the films 7 and 9. A channel dope region 6 for deciding the threshold voltage of a MOS transistor with high breakdown strength is formed in self-alignment at the region of the film 9 at the inside of the film 7 by ion implantation. By doing channel dope of P type exceeding the concentrations and the depths of the regions 3 and 5 formed at the whole face below the film 7, the film 7 and the regions 6, 3 and 5 are formed respectively in self-alignment manner. N<+>-type source region 2 and drain region 4 in high concentration are provided in self-alignment with the film 7 as a mask. In this way, the reliability can be elevated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device for a high voltage transistor used in a driving integrated circuit for a liquid crystal, which is a display element.

[Summary of the invention]

The present invention provides a highly reliable semiconductor device with a high breakdown voltage by providing a field insulating film formed in a self-aligned manner with an insulating film on a thinly doped drain region that achieves a high breakdown voltage. .

[Conventional technology]

FIG. 2 shows a cross-sectional view of a conventional high-voltage semiconductor device. In order to increase the breakdown voltage of the drain region 4, a semiconductor device is known in which a lightly doped drain region 5 is provided between the gate electrode 10 and the drain region 4. It is being

[Problem to be solved by the invention]

However, in the case of a conventional semiconductor device, there is no gate electrode 10 on the thinly doped drain region 5, and furthermore, the insulating film on the thinly doped drain region 5 is generally formed by CVD, which is not formed by thermal oxidation but at a low temperature. Since it is formed of an oxide film, its ability to protect against the intrusion of foreign matter from the outside is poor, so there was a problem that the resistance value of the drain region 5 with a thin concentration did not fluctuate over long-term operation. .

[Means to solve the problem]

In order to solve the above problems, a field insulating film made of a high-quality thermal oxide film is provided in the surface area where a strong electric field is applied due to a high drain voltage, and a gate electrode is further provided on the field insulating film. A highly reliable high-voltage semiconductor device has been realized.

〔Example〕

Embodiments of the present invention will be described based on the drawings.

The N-type fossa pressure resistance pAOS (H6tal-O
xide-3eniconductor) The case of a T-transistor will be explained. In the case of P type, the conductivity type may be reversed.

A field oxide film 7 formed of a thermal oxide film is provided for steering the P-type silicon semiconductor 1. field oxidation 11
1! ! A lightly doped source region 3 and a drain region 5 are provided on the surface of the semiconductor substrate 1 under the region 7 . A gate oxide WA9 is provided inside the field oxide film 7, which is formed after drilling by etching. A gate electrode lO is provided on gate oxide film 9 and field oxide film 7. A channel doped region that determines the threshold voltage of this high voltage MOS transistor is formed by ion implantation in a self-aligned manner into a region of gate oxide film 9 provided inside the field oxide film. By forming a P-type channel dope 1 that exceeds the concentration and depth of the thin source region 3 and drain region 5 formed entirely under the field oxide film 7, the field oxide film 7 and the channel doped region 6 have a thin concentration. A source region 3 and a lightly doped drain region 5 are formed in a self-aligned manner.

Further, the heavily doped N+ type source region 2 and drain region 4 are provided in a self-aligned manner using the field oxidation 11!7 as a mask.

In the semiconductor device of the present invention, a thick field thermal oxide film 7 of excellent quality is formed on the L of the heavily doped source region 2 and drain region 5, and the gate electrode [!
10, the structure has a high breakdown voltage and is strong against external foreign matter and electric fields. Since the field oxide film is a thermal oxide film, there is no problem such as the change in resistance of the lightly doped drain region 5 due to polarization of the PSG film used in conventional semiconductor devices. 1st
Although the figure shows an example in which both the source and drain regions have a high breakdown voltage structure, only the drain region may have a high breakdown voltage structure as shown in FIG.

〔Effect of the invention〕

As explained above, in a high-voltage semiconductor device, stacking the gate electrode on a thinly doped drain region with a high-quality oxide film interposed therebetween has the effect of increasing the breakdown voltage and reliability. .

FIG.

4...Densely concentrated drain region 5...Light concentration drain region 10・・・Gate electrode that's all Applicant: Seiko Electronics Industries Co., Ltd. Agent: Patent Attorney: Keinosuke Hayashi

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device according to the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. FIG. 3 shows a semiconductor device according to an embodiment of the present invention. Fig. 1. Diagram of the nail surface of the conventional 1 μm device.

Claims (1)

[Claims] A heavily doped source region and a heavily doped drain region of a second conductive type are provided at intervals on the surface of a semiconductor substrate of a first conductive type; a channel dump region of a first conductivity type provided on the surface of the semiconductor substrate between a thin drain region of a second conductivity type and the heavily doped source region in contact with the heavily doped drain region; a gate insulating film provided on the channel doped region; a field insulating film provided on the heavily doped drain region;
A semiconductor device comprising the gate insulating film and a gate electrode provided on the field insulating film.