JPH0210617U - - Google Patents
Info
- Publication number
- JPH0210617U JPH0210617U JP8888788U JP8888788U JPH0210617U JP H0210617 U JPH0210617 U JP H0210617U JP 8888788 U JP8888788 U JP 8888788U JP 8888788 U JP8888788 U JP 8888788U JP H0210617 U JPH0210617 U JP H0210617U
- Authority
- JP
- Japan
- Prior art keywords
- gain
- converter
- rom
- voltage value
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図はこの考案の一実施例による利得制御装
置を示すブロツク図、第２図は従来の利得制御装
置を示すブロツク図、第３図は第２図のアナログ
スイツチの詳細図、第４図は可変アツテネータの
印加バイアス値に対する減衰量の関係を示す図、
第５ａ図はゲインステータス情報のビツトパタン
を示す図、第５ｂ図は、第２図中の選択スイツチ
情報のビツトパタンを示す図であり、１はテレコ
マンド信号入力端子、２はテレコマンド信号、３
はゲインステータスデコーダ、４はゲインステー
タス情報、５はＲＯＭ、６はデイジタルバイアス
値、７はＤ／Ａコンバータ、８は可変アツテネー
タ、９はアツテネータバイアス値を示す。なお、
図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a block diagram showing a gain control device according to an embodiment of this invention, FIG. 2 is a block diagram showing a conventional gain control device, FIG. 3 is a detailed diagram of the analog switch shown in FIG. 2, and FIG. 4 is a block diagram showing a conventional gain control device. is a diagram showing the relationship between the attenuation amount and the applied bias value of the variable attenuator,
FIG. 5a is a diagram showing a bit pattern of gain status information, and FIG. 5b is a diagram showing a bit pattern of selection switch information in FIG.
4 is a gain status decoder, 4 is gain status information, 5 is a ROM, 6 is a digital bias value, 7 is a D/A converter, 8 is a variable attenuator, and 9 is an attenuator bias value. In addition,
In the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
し、入力コマンド信号から設定利得状態を解読す
るゲインステータスデコーダと、ゲインステータ
スデコーダの出力する利得状態に対応した減衰量
を得るために必要な電圧値を読み出すＲＯＭ（リ
ード・オンリー・メモリ）と、ＲＯＭより出力さ
れる値をアナログ量へ変換するためのＤ／Ａコン
バータと、Ｄ／Ａコンバータにより変換されたア
ナログ電圧値により通過損失を制御できる可変ア
ツテネータとで構成されていることを特徴とする
利得制御装置。 It has an input terminal into which telecommand pulses are input, a gain status decoder that decodes the set gain state from the input command signal, and a voltage value necessary to obtain the attenuation amount corresponding to the gain state output from the gain status decoder. A ROM (read only memory) to read out, a D/A converter for converting the value output from the ROM into an analog quantity, and a variable attenuator that can control passing loss using the analog voltage value converted by the D/A converter. A gain control device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8888788U JPH0210617U (en) | 1988-07-04 | 1988-07-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8888788U JPH0210617U (en) | 1988-07-04 | 1988-07-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0210617U true JPH0210617U (en) | 1990-01-23 |
Family
ID=31313446
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8888788U Pending JPH0210617U (en) | 1988-07-04 | 1988-07-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0210617U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6258295U (en) * | 1976-07-30 | 1987-04-10 |
-
1988
- 1988-07-04 JP JP8888788U patent/JPH0210617U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6258295U (en) * | 1976-07-30 | 1987-04-10 | ||
| JPS6329678Y2 (en) * | 1976-07-30 | 1988-08-09 |
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