JPH02100145A - Computer system for microprogram control system - Google Patents

Abstract

PURPOSE:To dispense with a decoder circuit by providing a first data register to hold data in an extension storage at an address pointed by a micro address register and a second data register to hold the data read out from the extension storage at the address pointed by the micro address register. CONSTITUTION:A reloadable extension storage 6 instructed by the micro address register 2 corresponding to each address of a control storage 1 in one to one, the first data register 7 to hold the data stored in the extension storage 6, and the second data register 8 to hold the data read out from the extension storage 6 at the address pointed by the micro address register 2 are provided. When the prescribed address of the control storage 1 is executed, the data is read out from the corresponding address of the extension storage 6 by storing prescribed data at the address of the extension storage 6 corresponding to the prescribed address of the control storage 1. A readout signal can be used directly as, for example, the trigger signal of an oscilloscope. In such a way, it is possible to dispense with the decoder circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a computer system using a microprogram control method, and particularly to a computer system that enables debugging, failure analysis, or performance measurement thereof.

[Prior Art] Fig. 2 is a block diagram showing the main part configuration of a conventional computer system of this type. In the figure, (1) is a control memory that stores micro instructions, and is mainly a read-only ROM.
It consists of (2) is a microaddress register that holds a microaddress for reading a microinstruction from the above control memory +1), and (3) is a microaddress register that holds a microaddress for reading a microinstruction from the above control memory (+1).
This is a microinstruction register that holds the microinstructions read from (1), and this microinstruction register (3)
The microinstructions held in the microinstructions are executed. On the other hand, +
4) t+51 is a first decoding circuit and a second decoding circuit provided for debugging, failure analysis, or performance measurement.
The first decoding circuit (4) decodes the microaddress held in the microaddress register (2) and sets it to 1'' when the address is a specific address set in advance. In other cases, it is converted to 'O' and output.The second decoding circuit (5) decodes the microinstruction held in the microinstruction register (3) and converts the instruction into a preset specific When the microinstruction is II 1 #, otherwise # 017
Each decoding circuit f4L
The output signal of (5) is used as a trigger signal for an oscilloscope or logic analyzer.

Next, the operation will be explained.

In the control memory (1), predetermined microinstructions are stored in advance at each address. The address of the next microinstruction to be executed is stored in the microaddress register (2), and the microinstruction at the address pointed to by the above address is read from the control memory (1), stored in the microinstruction register (3), and executed. will be moved to In order to detect that a specific address has been executed, a first decoding circuit (4) decodes the microaddress of the microaddress register (2).
) to decode and output l(1##) only at a specific address.Furthermore, in order to detect the execution of a specific microinstruction, the microinstruction register (3) A second decoding circuit (5) for decoding microinstructions is provided, and only when a specific microinstruction ((
Decode it to 1$1 and output it. Therefore, the decoding circuit +41. (By using the "1" signal output from 51 as a trigger signal for an oscilloscope or logic analyzer, debugging and failure analysis of hardware and microprograms can be performed.

Alternatively, performance can be measured by measuring the time interval between one specific address and another specific address, or one specific microinstruction and another specific microinstruction.

[Problems to be Solved by the Invention] Conventional computer systems of this type are configured as described above, so when debugging, failure analysis, or performance measurement of hardware or microprograms, it is necessary to In order to detect the execution of a microinstruction, a decoding circuit is required to decode the microaddress or microinstruction and generate a trigger signal for an oscilloscope or logic analyzer, but these decoding circuits are different each time. There were problems in that the decoding circuit could not be made in advance together with other circuits, and therefore the decoding circuit had to be made in a separate module.

This invention was made in order to solve the above problems, and it is possible to easily detect a specific address or the execution of a specific instruction without creating a decoding circuit in a separate module each time. The purpose is to obtain a program-controlled computer system.

[Means for Solving the Problems] A computer system using a microprogram control method according to the present invention has a rewritable extended memory that exists corresponding to each address of the control memory and is pointed to by a microaddress register. and the first one that holds the data to be stored in the expanded memory at the address pointed to by the microaddress register.
, and a second data register that holds data read from the expanded storage at the address pointed to by the microaddress register.

[Operation] In this invention, by storing specific data in advance at an address in extended memory that corresponds to a specific address in control memory, when a specific address in control memory is executed, the data is read from the corresponding extended memory address. Data is read. The read signal can be used directly as a trigger signal for an oscilloscope or logic analyzer, for example.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the main structure of the embodiment, and the same or corresponding parts as in the conventional example shown in FIG.

In the figure, (6) is extended memory that exists in one-to-one correspondence with all addresses of control memory (1), and is pointed to by micro address register (2) like control memory (1), and is rewritable. It is made up of available RAM. (7
) is the first data register that holds the data to be written to the expanded memory (6) at the address pointed to by the micro address register (2), and (8) is the micro address register (2).
This is a second data register that holds data read from the expanded storage (6) at the address indicated by .

Next, the operation will be explained.

First, an example will be explained in which the execution of a specific address is detected. Set the contents of all addresses in the extended memory (6) to "0" in advance, and then use the micro address register (2) and the first data register (7) to set the specific address of the control memory fi+ that you want to detect. Write "1" to just one arbitrary bit of the expanded memory (6) of the address corresponding to the address.This means that when the address you want to detect is executed, that is, the address you want to detect is set in the microaddress register (2). Therefore, the original microinstruction is read out from the control memory (1) to the microinstruction register (3). At the same time, "1" written in advance is read out from the same address in the extended storage (6) to the second data register (8). At this time, when observing the contents of the second data register (8), a signal of "1" is output only when the address to be detected is executed. This signal can be used directly as a trigger signal for an oscilloscope or logic analyzer without a special decoding circuit, making it easy to debug and analyze failures of hardware and microprograms. Furthermore, the time interval between one specific address and another specific address can be measured, and performance can be easily measured.

Next, an example of detecting execution of a specific microinstruction will be described. In this case too.

The contents of all addresses in the expanded memory (6) are set to ``0'' in advance, and the microinstruction to be detected is stored using the microaddress register (2) and the first data register (7). Set "1" to only one arbitrary bit of the extended memory (6) at the address corresponding to the address of the control memory (1) located in the control memory (1).
′ is written. As a result, when the microinstruction to be detected is executed, the address where the microinstruction to be detected is stored is stored in the microaddress register (2).
Therefore, the original microinstruction is read from the control memory (11) to the microinstruction register (3). At the same time, the "1" written in advance is read from the same address in the extended memory (6) to the second microinstruction. At this time, when observing the contents of the second data register (8), a signal of "1" is output only when the microinstruction to be detected is executed. The signal can be used directly as a trigger signal for an oscilloscope or logic analyzer without a special decoding circuit, making it easy to debug hardware or microprograms or analyze failures. The time interval between microinstructions can be measured, making performance measurements easy.

Note that although the bit width of the extended memory (6) is not specified in the above embodiment, the same effect as described above can be achieved with any bit width.

[Effects of the Invention] As described above, according to the present invention, the rewritable extended memory exists in one-to-one correspondence with each address of the control memory and is pointed to by the microaddress register, and a first data register that holds data stored in the extended memory at the address; and a second data register that holds data read from the extended memory at the address pointed to by the microaddress register;
Specific data can be written to a desired address in the extended memory corresponding to the control memory, and the signals read out from the extended memory corresponding to the control memory can be easily observed, so the trigger signal of an oscilloscope or logic analyzer can be easily observed. This eliminates the need for a decoding circuit for generation, which has the effect of facilitating debugging, failure analysis, and performance measurement of hardware and microprograms.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main part configuration of a computer system according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the main part structure of a computer system according to the prior art. (1) is control memory, (2) is microaddress register, (3) is microinstruction register, (6) is extended memory,
(7) is a first data register, and (8) is a second data register. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A microprogram control computer equipped with a control memory for storing microinstructions, a microaddress register for holding microaddresses, and a microinstruction register for holding microinstructions read from the control memory at the address pointed to by the microaddress register. In the system, a rewritable extended memory exists in a one-to-one correspondence with each address of the control memory and is pointed to by the microaddress register, and data to be stored in the extended memory at the address pointed to by the microaddress register is held. 1. A computer system using a microprogram control system, comprising: a first data register that holds data read from extended storage at an address pointed to by the microaddress register;