JPH0179841U - - Google Patents
Info
- Publication number
- JPH0179841U JPH0179841U JP17454487U JP17454487U JPH0179841U JP H0179841 U JPH0179841 U JP H0179841U JP 17454487 U JP17454487 U JP 17454487U JP 17454487 U JP17454487 U JP 17454487U JP H0179841 U JPH0179841 U JP H0179841U
- Authority
- JP
- Japan
- Prior art keywords
- chip element
- mechanical component
- spacer
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 125000006850 spacer group Chemical group 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
- H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案の原理図、第２図ａ，ｂは本考
案の実施に使用することのできるＦＥＴチツプ素
子のそれぞれ斜視図及び等価回路図、第３図は本
考案の実施例を示すＦＥＴチツプ素子の実装構造
の断面図、第４図はチツプ素子の従来の実装構造
の断面図、第５図は従来技術の問題点説明図であ
つて、利得と周波数との関係を示すグラフである
。
１，２４……機構部品、２，２３……プリント
基板、３，２１，２２……配線パターン、４……
チツプ素子、５，２８，２９……ボンデイングワ
イヤ、６，２５……穴、７，２７……スペーサ、
１１……ＦＥＴチツプ素子。
Figure 1 is a diagram showing the principle of the present invention, Figures 2a and b are perspective views and equivalent circuit diagrams of FET chip elements that can be used to implement the present invention, and Figure 3 is an embodiment of the present invention. FIG. 4 is a sectional view of a conventional mounting structure of a FET chip element, and FIG. be. 1, 24... Mechanical parts, 2, 23... Printed circuit board, 3, 21, 22... Wiring pattern, 4...
Chip element, 5, 28, 29... bonding wire, 6, 25... hole, 7, 27... spacer,
11...FET chip element.
Claims (1)
ント基板２上の配線パターン３にチツプ素子４を
ボンデイングワイヤ５によつて電気的に接続して
なるチツプ素子の実装構造において、 プリント基板２の配線パターン３形成側から機
構部品１に到達する穴６を設け、 該穴６の機構部品１側に導電体からなるスペー
サ７を固定し、 該スペーサ７上にチツプ素子４を設けたことを
特徴とするチツプ素子の実装構造。[Claims for Utility Model Registration] Mounting of a chip element in which a chip element 4 is electrically connected by a bonding wire 5 to a wiring pattern 3 on a printed circuit board 2 integrated with a mechanical component 1 made of a conductor. In the structure, a hole 6 is provided that reaches the mechanical component 1 from the wiring pattern 3 forming side of the printed circuit board 2, a spacer 7 made of a conductor is fixed to the mechanical component 1 side of the hole 6, and a chip element is placed on the spacer 7. 4. A chip element mounting structure characterized by providing a chip element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17454487U JPH0179841U (en) | 1987-11-16 | 1987-11-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17454487U JPH0179841U (en) | 1987-11-16 | 1987-11-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0179841U true JPH0179841U (en) | 1989-05-29 |
Family
ID=31466393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17454487U Pending JPH0179841U (en) | 1987-11-16 | 1987-11-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0179841U (en) |
-
1987
- 1987-11-16 JP JP17454487U patent/JPH0179841U/ja active Pending