JPH0176064U - - Google Patents
Info
- Publication number
- JPH0176064U JPH0176064U JP1987172264U JP17226487U JPH0176064U JP H0176064 U JPH0176064 U JP H0176064U JP 1987172264 U JP1987172264 U JP 1987172264U JP 17226487 U JP17226487 U JP 17226487U JP H0176064 U JPH0176064 U JP H0176064U
- Authority
- JP
- Japan
- Prior art keywords
- package
- terminal
- power supply
- semiconductor device
- auxiliary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ないし第３図は本考案の一実施例の半導
体装置を示す斜視図、側面断面図及び断面図、第
４図は本考案の半導体装置における計測器の接続
図、第５図ないし第７図は従来の半導体装置を示
す斜視図側面断面図及び平面図である。
１……半導体チツプ、２……下部パツケージ、
３……金線、４……配線パターン、５……端子、
７……カバー、８……補助端子、９……配線パタ
ーン、１０……絶縁層、１１……上部パツケージ
、１２……計測器、１３……信号線、１５……接
続リード。
1 to 3 are perspective views, side sectional views, and sectional views showing a semiconductor device according to an embodiment of the present invention, FIG. 4 is a connection diagram of measuring instruments in the semiconductor device of the present invention, and FIGS. FIG. 7 is a perspective view, a side sectional view, and a plan view showing a conventional semiconductor device. 1... Semiconductor chip, 2... Lower package,
3... Gold wire, 4... Wiring pattern, 5... Terminal,
7... Cover, 8... Auxiliary terminal, 9... Wiring pattern, 10... Insulating layer, 11... Upper package, 12... Measuring instrument, 13... Signal line, 15... Connection lead.
Claims (1)
ツケージに設けられた信号供給端子と電源端子及
びアース端子とを備えた半導体装置において、上
記パツケージの底面以外の個所より補助電源端子
と補助アース端子を突出させ、これ等端子をパツ
ケージ内部において上記電源端子とアース端子に
それぞれ接続したことを特徴とする半導体装置。 (2) 補助電源端子及び補助アース端子をパツケ
ージの側面から水平方向へ突出させたことを特徴
とする実用新案登録請求の範囲第１項記載の半導
体装置。[Claims for Utility Model Registration] (1) In a semiconductor device comprising a package having a semiconductor chip, a signal supply terminal, a power supply terminal, and a ground terminal provided on the package, an auxiliary power supply is provided from a location other than the bottom surface of the package. A semiconductor device characterized in that a terminal and an auxiliary ground terminal are projected, and these terminals are connected to the power supply terminal and the ground terminal, respectively, inside a package. (2) The semiconductor device according to claim 1, wherein the auxiliary power supply terminal and the auxiliary ground terminal protrude horizontally from the side surface of the package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987172264U JPH0176064U (en) | 1987-11-11 | 1987-11-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987172264U JPH0176064U (en) | 1987-11-11 | 1987-11-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0176064U true JPH0176064U (en) | 1989-05-23 |
Family
ID=31464241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987172264U Pending JPH0176064U (en) | 1987-11-11 | 1987-11-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0176064U (en) |
-
1987
- 1987-11-11 JP JP1987172264U patent/JPH0176064U/ja active Pending