JPH0161715U - - Google Patents
Info
- Publication number
- JPH0161715U JPH0161715U JP15644487U JP15644487U JPH0161715U JP H0161715 U JPH0161715 U JP H0161715U JP 15644487 U JP15644487 U JP 15644487U JP 15644487 U JP15644487 U JP 15644487U JP H0161715 U JPH0161715 U JP H0161715U
- Authority
- JP
- Japan
- Prior art keywords
- fet
- operational amplifier
- generating means
- voltage generating
- constant voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Measurement Of Resistance Or Impedance (AREA)
- Control Of Voltage And Current In General (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Description
第1図はこの考案の一実施例である定電流回路
の回路図、第2図は第1図に示したゲート回路の
一実施例を示す回路図、第3図はこの考案の他の
実施例である定電流回路の回路図、第4図は従来
の定電流回路の回路図である。
Fig. 1 is a circuit diagram of a constant current circuit which is an embodiment of this invention, Fig. 2 is a circuit diagram showing an embodiment of the gate circuit shown in Fig. 1, and Fig. 3 is another embodiment of this invention. FIG. 4 is a circuit diagram of an example of a constant current circuit, and FIG. 4 is a circuit diagram of a conventional constant current circuit.
Claims (1)
続された演算増幅器と、 D 該演算増幅器の反転入力側と上記第二定電圧
発生手段との間に直列に接続された複数の分圧抵
抗と、 E ソースが各分圧抵抗の演算増幅器側の端子に
接続され、ドレインが共通接続されて出力端子に
接続された複数のFETと、 F 一端が上記演算増幅器の出力側に接続され、
他端が各々のFETのゲートに接続された複数の
帰還抵抗と、 G 上記FETと同じ数の制御信号入力端子と、 H 各制御信号入力端子と各FETのゲートとの
間に接続され、制御信号入力端子から供給される
上記FETをオフにする信号を、上記FETをオ
ンにする信号より遅れて伝達する複数のゲート回
路と、 I 上記出力端子から出力される電圧がリミツタ
レベルを越えたとき、上記出力端子を所定の電圧
に保持する出力電圧リミツタ回路と、 を具備して成ることを特徴とする定電流回路。[Claims for Utility Model Registration] A: a first constant voltage generating means; B: a second constant voltage generating means; C: an operational amplifier whose non-inverting input side is connected to the first constant voltage generating means; D: the operational amplifier A plurality of voltage dividing resistors are connected in series between the inverting input side of the voltage dividing resistor and the second constant voltage generating means, and an E source is connected to the operational amplifier side terminal of each voltage dividing resistor, and the drains are commonly connected. a plurality of FETs connected to the output terminal of F, one end of which is connected to the output side of the operational amplifier;
A plurality of feedback resistors whose other ends are connected to the gates of each FET; G control signal input terminals of the same number as the above FETs; H connected between each control signal input terminal and the gate of each FET, a plurality of gate circuits that transmit a signal to turn off the FET supplied from a signal input terminal later than a signal to turn on the FET; A constant current circuit comprising: an output voltage limiter circuit that holds the output terminal at a predetermined voltage;
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15644487U JPH0534026Y2 (en) | 1987-10-13 | 1987-10-13 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15644487U JPH0534026Y2 (en) | 1987-10-13 | 1987-10-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0161715U true JPH0161715U (en) | 1989-04-19 |
JPH0534026Y2 JPH0534026Y2 (en) | 1993-08-30 |
Family
ID=31434991
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15644487U Expired - Lifetime JPH0534026Y2 (en) | 1987-10-13 | 1987-10-13 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0534026Y2 (en) |
-
1987
- 1987-10-13 JP JP15644487U patent/JPH0534026Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0534026Y2 (en) | 1993-08-30 |
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