JPS60136562U - signal transmission circuit - Google Patents
signal transmission circuitInfo
- Publication number
- JPS60136562U JPS60136562U JP2541784U JP2541784U JPS60136562U JP S60136562 U JPS60136562 U JP S60136562U JP 2541784 U JP2541784 U JP 2541784U JP 2541784 U JP2541784 U JP 2541784U JP S60136562 U JPS60136562 U JP S60136562U
- Authority
- JP
- Japan
- Prior art keywords
- transmission circuit
- resistance element
- signal transmission
- variable resistance
- differential amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Selective Calling Equipment (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Dc Digital Transmission (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の信号伝送回路の構成図、第2図は第1図
の特性図、第3図は本考案に基づく信号伝送回路の一実
施例を示す構成図、第4図と第5図は第3図の特性図、
第6図は第3図の送信回路の他の実施例を示す構成図、
第7図は第6図の特性図、第8図は第2図の送信回路の
更に他の実施例の構成図である。
1・・・送信回路、2・・・送信回路、3・・・信号線
、4・・・電源共通線、10〜12・・・スイッチ、1
8・・・可変抵抗要素、19・・・演算増幅器、22・
・・帰還抵抗、Vref・・・基準電圧、Vcc・・・
電源電圧、Vo・・・出力電圧。Fig. 1 is a block diagram of a conventional signal transmission circuit, Fig. 2 is a characteristic diagram of Fig. 1, Fig. 3 is a block diagram showing an embodiment of a signal transmission circuit based on the present invention, and Figs. The figure is the characteristic diagram of Figure 3,
FIG. 6 is a configuration diagram showing another embodiment of the transmitting circuit shown in FIG. 3;
7 is a characteristic diagram of FIG. 6, and FIG. 8 is a configuration diagram of still another embodiment of the transmitting circuit of FIG. 2. DESCRIPTION OF SYMBOLS 1... Transmission circuit, 2... Transmission circuit, 3... Signal line, 4... Power supply common line, 10-12... Switch, 1
8... Variable resistance element, 19... Operational amplifier, 22...
...Feedback resistance, Vref...Reference voltage, Vcc...
Power supply voltage, Vo...output voltage.
Claims (1)
よび受信回路を信号線並びに電源共通線よりなる一対の
伝送線により互いに接線し、前記送信回路を、前記信号
線と電源共通線の間の抵抗値を変化しうる可変抵抗要素
から構成し、前記受信回路を、差動増幅器の一方の入力
端子に所定の基準電圧を印加してその他方の入力端子は
帰還抵抗を介してその出力端子に接続すると共に抵抗を
介して電源の一端ならびに前記信号線とにそれぞれ接続
して、前記送信回路における可変抵抗要素の抵抗値の変
化に対応してた電圧を前記差動増幅器の出力から取出す
よう構成した信号伝送回路。 2 送信回路の可変抵抗要素を、複数個の抵抗および複
数個のスイッチにより構成したことを特徴とする実用新
案登録請求の範囲第1項記載の信号伝送回路。 3 送信回路の可変抵抗要素を、抵抗とスイッチとの直
列接続を複数組と、1個以上の抵抗をそれぞれ並列接続
し、前記スイッチと直列接続された抵抗は、それらのう
ち最も小さな抵抗値を伊 Rとした時それぞれの抵抗値をR,2R,4R。 囮・・・とほぼ指数関数的に定めたことを特徴とする実
用新案登録請求の範囲第2項記載の信号伝送回路。 4 送信回路の可変抵抗要素におけるおのおののスイッ
チを、トランジスタ、アナログスイッチ等の半導体スイ
ッチにより構成したことを特徴とする実用新案登録請求
の範囲第2項記載の信号伝送回路。[Claims for Utility Model Registration] 1. A transmitting circuit and a receiving circuit housed in different casings are connected to each other by a pair of transmission lines consisting of a signal line and a power supply common line, and the transmitting circuit is connected to the signal line and the power supply common line. The receiving circuit is constructed of a variable resistance element that can change the resistance value between the common lines, and the receiving circuit is configured such that a predetermined reference voltage is applied to one input terminal of a differential amplifier, and the other input terminal is connected to the differential amplifier through a feedback resistor. is connected to the output terminal of the differential amplifier, and is also connected to one end of the power supply and the signal line through a resistor to apply a voltage corresponding to a change in the resistance value of the variable resistance element in the transmission circuit to the differential amplifier. A signal transmission circuit configured to extract from the output. 2. The signal transmission circuit according to claim 1, wherein the variable resistance element of the transmission circuit is constituted by a plurality of resistors and a plurality of switches. 3. The variable resistance element of the transmitting circuit is connected in parallel with multiple series-connected resistors and switches, and one or more resistors, and the resistor connected in series with the switch has the smallest resistance value among them. When R is set, the respective resistance values are R, 2R, and 4R. The signal transmission circuit according to claim 2 of the utility model registration claim, characterized in that the decoy is determined almost exponentially. 4. The signal transmission circuit according to claim 2, wherein each switch in the variable resistance element of the transmission circuit is constituted by a semiconductor switch such as a transistor or an analog switch.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2541784U JPS60136562U (en) | 1984-02-23 | 1984-02-23 | signal transmission circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2541784U JPS60136562U (en) | 1984-02-23 | 1984-02-23 | signal transmission circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60136562U true JPS60136562U (en) | 1985-09-10 |
Family
ID=30520463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2541784U Pending JPS60136562U (en) | 1984-02-23 | 1984-02-23 | signal transmission circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60136562U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5928793A (en) * | 1982-08-09 | 1984-02-15 | Sanyo Electric Co Ltd | Signal transmitter |
-
1984
- 1984-02-23 JP JP2541784U patent/JPS60136562U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5928793A (en) * | 1982-08-09 | 1984-02-15 | Sanyo Electric Co Ltd | Signal transmitter |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS60136562U (en) | signal transmission circuit | |
SU1170585A1 (en) | Bidirectional amplifier | |
JPH0610409Y2 (en) | Power supply circuit | |
JPS5832598U (en) | Gain switching circuit | |
JPS5883837U (en) | semiconductor switch circuit | |
JPS58135116U (en) | Muting circuit | |
JPS6093345U (en) | two wire transmitter | |
JPS60153314U (en) | current switching circuit | |
JPS5981121U (en) | Signal amplitude adjustment circuit | |
JPS59127324U (en) | variable gain circuit | |
JPS59114619U (en) | Amplifier circuit with variable gain function | |
JPS60160628U (en) | electronic volume | |
JPS59177234U (en) | variable delay circuit | |
JPS5893044U (en) | high frequency switch circuit | |
JPS6424600U (en) | ||
JPS59187249U (en) | optical digital signal receiver | |
JPS5953499U (en) | two wire transmitter | |
JPH0161715U (en) | ||
JPS6115847U (en) | Day emphasis circuit | |
JPS6035633U (en) | variable gain circuit | |
JPS6344300U (en) | ||
JPS62169524U (en) | ||
JPS59140524U (en) | Frequency characteristic correction circuit | |
JPS5978601U (en) | trimming resistance | |
JPS5984916U (en) | Frequency characteristic adjustment circuit |