JPH0159348U - - Google Patents
Info
- Publication number
- JPH0159348U JPH0159348U JP15472187U JP15472187U JPH0159348U JP H0159348 U JPH0159348 U JP H0159348U JP 15472187 U JP15472187 U JP 15472187U JP 15472187 U JP15472187 U JP 15472187U JP H0159348 U JPH0159348 U JP H0159348U
- Authority
- JP
- Japan
- Prior art keywords
- cable
- data
- timing signal
- terminal device
- transmission data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000003111 delayed effect Effects 0.000 claims description 2
- 238000005070 sampling Methods 0.000 claims 2
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Description
図は本考案の実施例を示すブロツク図である。
１……終端装置（ＤＣＥ）、２……端末装置（
ＤＴＥ）、３……ケーブル、１３，２２……フリ
ツプフロツプ回路（ＦＦＣ）、１４……シフトレ
ジスタ（ＳＲ）、Ｓ……タイミング信号（ＴＭＳ
）、Ｓｄ……遅延タイミング信号（ＤＴＭ）、Ｄ
Ｔ，ＤＳ……データ、Ｔ……送信データ。
The figure is a block diagram showing an embodiment of the present invention. 1...Terminal equipment (DCE), 2...Terminal equipment (
DTE), 3... Cable, 13, 22... Flip-flop circuit (FFC), 14... Shift register (SR), S... Timing signal (TMS)
), Sd...delayed timing signal (DTM), D
T, DS...data, T...transmission data.
Claims (1)
ルにより接続し、前記終端装置からケーブルを介
して送出するタイミング信号と同期して前記端末
装置から送信データを送出し、ケーブルを介する
前記送信データを終端装置において前記タイミン
グ信号によりサンプリングし、該サンプリングの
結果にしたがいデータの送信を行なうデータ通信
装置において、前記終端装置のタイミング信号に
対するケーブルを介した前記送信データの遅延時
間に応じ前記サンプリングの時点を遅延させる遅
延手段を設けたことを特徴とするタイミング設定
回路。 Connecting a data line termination device and a terminal device with a cable, transmitting data from the terminal device in synchronization with a timing signal sent from the termination device via the cable, and terminating the transmission data via the cable. In a data communication device that samples data using the timing signal in the device and transmits data according to the sampling result, the sampling point is delayed according to a delay time of the transmission data via the cable with respect to the timing signal of the terminal device. A timing setting circuit characterized in that it is provided with a delay means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15472187U JPH0159348U (en) | 1987-10-12 | 1987-10-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15472187U JPH0159348U (en) | 1987-10-12 | 1987-10-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0159348U true JPH0159348U (en) | 1989-04-13 |
Family
ID=31431703
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15472187U Pending JPH0159348U (en) | 1987-10-12 | 1987-10-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0159348U (en) |
-
1987
- 1987-10-12 JP JP15472187U patent/JPH0159348U/ja active Pending
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