JPH0158542B2 - - Google Patents

Info

Publication number
JPH0158542B2
JPH0158542B2 JP9182682A JP9182682A JPH0158542B2 JP H0158542 B2 JPH0158542 B2 JP H0158542B2 JP 9182682 A JP9182682 A JP 9182682A JP 9182682 A JP9182682 A JP 9182682A JP H0158542 B2 JPH0158542 B2 JP H0158542B2
Authority
JP
Japan
Prior art keywords
data
communication network
memory
buffer memories
packet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9182682A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58207748A (ja
Inventor
Masato Amamya
Osamu Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP9182682A priority Critical patent/JPS58207748A/ja
Publication of JPS58207748A publication Critical patent/JPS58207748A/ja
Publication of JPH0158542B2 publication Critical patent/JPH0158542B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
JP9182682A 1982-05-28 1982-05-28 データ転送路接続制御方式 Granted JPS58207748A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9182682A JPS58207748A (ja) 1982-05-28 1982-05-28 データ転送路接続制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9182682A JPS58207748A (ja) 1982-05-28 1982-05-28 データ転送路接続制御方式

Publications (2)

Publication Number Publication Date
JPS58207748A JPS58207748A (ja) 1983-12-03
JPH0158542B2 true JPH0158542B2 (https=) 1989-12-12

Family

ID=14037412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9182682A Granted JPS58207748A (ja) 1982-05-28 1982-05-28 データ転送路接続制御方式

Country Status (1)

Country Link
JP (1) JPS58207748A (https=)

Also Published As

Publication number Publication date
JPS58207748A (ja) 1983-12-03

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