JPH0156596B2 - - Google Patents

Info

Publication number
JPH0156596B2
JPH0156596B2 JP1815083A JP1815083A JPH0156596B2 JP H0156596 B2 JPH0156596 B2 JP H0156596B2 JP 1815083 A JP1815083 A JP 1815083A JP 1815083 A JP1815083 A JP 1815083A JP H0156596 B2 JPH0156596 B2 JP H0156596B2
Authority
JP
Japan
Prior art keywords
station data
call processing
maintenance
memory
data memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1815083A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59144296A (ja
Inventor
Hiroki Niwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP1815083A priority Critical patent/JPS59144296A/ja
Publication of JPS59144296A publication Critical patent/JPS59144296A/ja
Publication of JPH0156596B2 publication Critical patent/JPH0156596B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Multi Processors (AREA)
JP1815083A 1983-02-08 1983-02-08 電子交換機における局デ−タ制御方式 Granted JPS59144296A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1815083A JPS59144296A (ja) 1983-02-08 1983-02-08 電子交換機における局デ−タ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1815083A JPS59144296A (ja) 1983-02-08 1983-02-08 電子交換機における局デ−タ制御方式

Publications (2)

Publication Number Publication Date
JPS59144296A JPS59144296A (ja) 1984-08-18
JPH0156596B2 true JPH0156596B2 (cs) 1989-11-30

Family

ID=11963580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1815083A Granted JPS59144296A (ja) 1983-02-08 1983-02-08 電子交換機における局デ−タ制御方式

Country Status (1)

Country Link
JP (1) JPS59144296A (cs)

Also Published As

Publication number Publication date
JPS59144296A (ja) 1984-08-18

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