JPH0153940B2 - - Google Patents
Info
- Publication number
- JPH0153940B2 JPH0153940B2 JP58186105A JP18610583A JPH0153940B2 JP H0153940 B2 JPH0153940 B2 JP H0153940B2 JP 58186105 A JP58186105 A JP 58186105A JP 18610583 A JP18610583 A JP 18610583A JP H0153940 B2 JPH0153940 B2 JP H0153940B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- output
- timing
- error
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1806—Pulse code modulation systems for audio signals
- G11B20/1813—Pulse code modulation systems for audio signals by adding special bits or symbols to the coded information
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58186105A JPS6077529A (ja) | 1983-10-05 | 1983-10-05 | デ−タ誤り検出・訂正回路 |
| US06/643,951 US4646303A (en) | 1983-10-05 | 1984-08-24 | Data error detection and correction circuit |
| DE8484306086T DE3483938D1 (de) | 1983-10-05 | 1984-09-06 | Datenfehlerdetektion und korrekturschaltung. |
| EP84306086A EP0139443B1 (en) | 1983-10-05 | 1984-09-06 | Data error detection and correction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58186105A JPS6077529A (ja) | 1983-10-05 | 1983-10-05 | デ−タ誤り検出・訂正回路 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22178983A Division JPS6094538A (ja) | 1983-10-05 | 1983-11-25 | デ−タ二重誤り検出方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6077529A JPS6077529A (ja) | 1985-05-02 |
| JPH0153940B2 true JPH0153940B2 (enrdf_load_stackoverflow) | 1989-11-16 |
Family
ID=16182445
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58186105A Granted JPS6077529A (ja) | 1983-10-05 | 1983-10-05 | デ−タ誤り検出・訂正回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6077529A (enrdf_load_stackoverflow) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63317837A (ja) * | 1987-10-09 | 1988-12-26 | Sanyo Electric Co Ltd | データ処理装置 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58123144A (ja) * | 1982-01-18 | 1983-07-22 | Nec Home Electronics Ltd | リ−ド・ソロモン符号復号方式 |
| JPS58125175A (ja) * | 1982-01-21 | 1983-07-26 | Sony Corp | ガロア体の乗算回路 |
-
1983
- 1983-10-05 JP JP58186105A patent/JPS6077529A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6077529A (ja) | 1985-05-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4646303A (en) | Data error detection and correction circuit | |
| EP0273676A2 (en) | Single track orthogonal error correction system | |
| US4800515A (en) | Circuit for operating finite fields | |
| US4868827A (en) | Digital data processing system | |
| US4451919A (en) | Digital signal processor for use in recording and/or reproducing equipment | |
| JPS632370B2 (enrdf_load_stackoverflow) | ||
| US5068856A (en) | Method and circuit for detecting data error | |
| JPH0153940B2 (enrdf_load_stackoverflow) | ||
| JPH0151095B2 (enrdf_load_stackoverflow) | ||
| JPH0828052B2 (ja) | Pcmデータのフレーム生成方法 | |
| KR920010184B1 (ko) | 유한체(有限體)의 연산회로 | |
| RU96111307A (ru) | Устройство для вычисления элементарных функций таблично-алгоритмическим методом | |
| JP3248315B2 (ja) | 誤り訂正装置 | |
| JP2612423B2 (ja) | Pcmデータのフレーム生成方式 | |
| JPH0793913A (ja) | 誤り訂正装置 | |
| JPS6390225A (ja) | 短縮巡回符号の符号化装置 | |
| JPH0414529B2 (enrdf_load_stackoverflow) | ||
| JPS605478A (ja) | 誤り訂正方法及び装置 | |
| KR950011290B1 (ko) | 어드레스 발생회로 | |
| JPH10107648A (ja) | 誤り訂正処理回路 | |
| JPH03117923A (ja) | 誤り訂正復号器 | |
| JPH0262982B2 (enrdf_load_stackoverflow) | ||
| JPS58104540A (ja) | 符号誤り補正装置 | |
| JPH0518490B2 (enrdf_load_stackoverflow) | ||
| JPH0766632B2 (ja) | デジタルオ−デイオ再生装置 |