JPH0151228B2 - - Google Patents
Info
- Publication number
- JPH0151228B2 JPH0151228B2 JP58066913A JP6691383A JPH0151228B2 JP H0151228 B2 JPH0151228 B2 JP H0151228B2 JP 58066913 A JP58066913 A JP 58066913A JP 6691383 A JP6691383 A JP 6691383A JP H0151228 B2 JPH0151228 B2 JP H0151228B2
- Authority
- JP
- Japan
- Prior art keywords
- buffer memory
- signal
- data
- signal line
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Facsimiles In General (AREA)
- Storing Facsimile Image Data (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58066913A JPS59193663A (ja) | 1983-04-18 | 1983-04-18 | バツフアメモリ制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58066913A JPS59193663A (ja) | 1983-04-18 | 1983-04-18 | バツフアメモリ制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59193663A JPS59193663A (ja) | 1984-11-02 |
| JPH0151228B2 true JPH0151228B2 (OSRAM) | 1989-11-02 |
Family
ID=13329678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58066913A Granted JPS59193663A (ja) | 1983-04-18 | 1983-04-18 | バツフアメモリ制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59193663A (OSRAM) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5961359A (ja) * | 1982-09-30 | 1984-04-07 | Toshiba Corp | ラインバツフア制御装置 |
-
1983
- 1983-04-18 JP JP58066913A patent/JPS59193663A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59193663A (ja) | 1984-11-02 |
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