JPH0146953B2 - - Google Patents
Info
- Publication number
- JPH0146953B2 JPH0146953B2 JP55155947A JP15594780A JPH0146953B2 JP H0146953 B2 JPH0146953 B2 JP H0146953B2 JP 55155947 A JP55155947 A JP 55155947A JP 15594780 A JP15594780 A JP 15594780A JP H0146953 B2 JPH0146953 B2 JP H0146953B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- mosfet
- node
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55155947A JPS5782281A (en) | 1980-11-07 | 1980-11-07 | Output level storage circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55155947A JPS5782281A (en) | 1980-11-07 | 1980-11-07 | Output level storage circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5782281A JPS5782281A (en) | 1982-05-22 |
| JPH0146953B2 true JPH0146953B2 (enExample) | 1989-10-11 |
Family
ID=15616996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55155947A Granted JPS5782281A (en) | 1980-11-07 | 1980-11-07 | Output level storage circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5782281A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6050694A (ja) * | 1983-08-26 | 1985-03-20 | Mitsubishi Electric Corp | ダイナミツク・ランダム・アクセス・メモリ |
| JPH0814987B2 (ja) * | 1985-06-21 | 1996-02-14 | 株式会社日立製作所 | 半導体記憶装置 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5625291A (en) * | 1979-08-07 | 1981-03-11 | Nec Corp | Semiconductor circuit |
-
1980
- 1980-11-07 JP JP55155947A patent/JPS5782281A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5782281A (en) | 1982-05-22 |
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