JPH0145092B2 - - Google Patents

Info

Publication number
JPH0145092B2
JPH0145092B2 JP26790384A JP26790384A JPH0145092B2 JP H0145092 B2 JPH0145092 B2 JP H0145092B2 JP 26790384 A JP26790384 A JP 26790384A JP 26790384 A JP26790384 A JP 26790384A JP H0145092 B2 JPH0145092 B2 JP H0145092B2
Authority
JP
Japan
Prior art keywords
port
access
ports
requests
request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP26790384A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61165169A (ja
Inventor
Takashi Chiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP26790384A priority Critical patent/JPS61165169A/ja
Publication of JPS61165169A publication Critical patent/JPS61165169A/ja
Publication of JPH0145092B2 publication Critical patent/JPH0145092B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
JP26790384A 1984-12-19 1984-12-19 アクセス優先順位制御方式 Granted JPS61165169A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26790384A JPS61165169A (ja) 1984-12-19 1984-12-19 アクセス優先順位制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26790384A JPS61165169A (ja) 1984-12-19 1984-12-19 アクセス優先順位制御方式

Publications (2)

Publication Number Publication Date
JPS61165169A JPS61165169A (ja) 1986-07-25
JPH0145092B2 true JPH0145092B2 (enrdf_load_html_response) 1989-10-02

Family

ID=17451219

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26790384A Granted JPS61165169A (ja) 1984-12-19 1984-12-19 アクセス優先順位制御方式

Country Status (1)

Country Link
JP (1) JPS61165169A (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPS61165169A (ja) 1986-07-25

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees