JPH0139655B2 - - Google Patents

Info

Publication number
JPH0139655B2
JPH0139655B2 JP16706582A JP16706582A JPH0139655B2 JP H0139655 B2 JPH0139655 B2 JP H0139655B2 JP 16706582 A JP16706582 A JP 16706582A JP 16706582 A JP16706582 A JP 16706582A JP H0139655 B2 JPH0139655 B2 JP H0139655B2
Authority
JP
Japan
Prior art keywords
etching
long strip
strip
sealed chamber
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16706582A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5956750A (ja
Inventor
Hiromichi Yoshida
Takashi Suzumura
Koichi Kayane
Shigeo Hagitani
Mitsuhiko Sugyama
Mamoru Onda
Fumio Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP16706582A priority Critical patent/JPS5956750A/ja
Publication of JPS5956750A publication Critical patent/JPS5956750A/ja
Publication of JPH0139655B2 publication Critical patent/JPH0139655B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828Etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • ing And Chemical Polishing (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP16706582A 1982-09-25 1982-09-25 長尺条体の連続部分エツチング法 Granted JPS5956750A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16706582A JPS5956750A (ja) 1982-09-25 1982-09-25 長尺条体の連続部分エツチング法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16706582A JPS5956750A (ja) 1982-09-25 1982-09-25 長尺条体の連続部分エツチング法

Publications (2)

Publication Number Publication Date
JPS5956750A JPS5956750A (ja) 1984-04-02
JPH0139655B2 true JPH0139655B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-08-22

Family

ID=15842746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16706582A Granted JPS5956750A (ja) 1982-09-25 1982-09-25 長尺条体の連続部分エツチング法

Country Status (1)

Country Link
JP (1) JPS5956750A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6372889A (ja) * 1986-09-12 1988-04-02 Showa Alum Corp リ−ドフレ−ムの製造方法

Also Published As

Publication number Publication date
JPS5956750A (ja) 1984-04-02

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