JPH0139141B2 - - Google Patents

Info

Publication number
JPH0139141B2
JPH0139141B2 JP58242582A JP24258283A JPH0139141B2 JP H0139141 B2 JPH0139141 B2 JP H0139141B2 JP 58242582 A JP58242582 A JP 58242582A JP 24258283 A JP24258283 A JP 24258283A JP H0139141 B2 JPH0139141 B2 JP H0139141B2
Authority
JP
Japan
Prior art keywords
processor
communication
inter
command
control device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58242582A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60134369A (ja
Inventor
Masahiro Tajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58242582A priority Critical patent/JPS60134369A/ja
Publication of JPS60134369A publication Critical patent/JPS60134369A/ja
Publication of JPH0139141B2 publication Critical patent/JPH0139141B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356Indirect interconnection networks
    • G06F15/17368Indirect interconnection networks non hierarchical topologies

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
JP58242582A 1983-12-21 1983-12-21 プロセツサ間通信方式 Granted JPS60134369A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58242582A JPS60134369A (ja) 1983-12-21 1983-12-21 プロセツサ間通信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58242582A JPS60134369A (ja) 1983-12-21 1983-12-21 プロセツサ間通信方式

Publications (2)

Publication Number Publication Date
JPS60134369A JPS60134369A (ja) 1985-07-17
JPH0139141B2 true JPH0139141B2 (enrdf_load_stackoverflow) 1989-08-18

Family

ID=17091202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58242582A Granted JPS60134369A (ja) 1983-12-21 1983-12-21 プロセツサ間通信方式

Country Status (1)

Country Link
JP (1) JPS60134369A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6371763A (ja) * 1986-09-16 1988-04-01 Michio Araki 精算装置
JP2738338B2 (ja) * 1995-04-24 1998-04-08 日本電気株式会社 フォールトトレラントシステム

Also Published As

Publication number Publication date
JPS60134369A (ja) 1985-07-17

Similar Documents

Publication Publication Date Title
US5991797A (en) Method for directing I/O transactions between an I/O device and a memory
US6847647B1 (en) Method and apparatus for distributing traffic over multiple switched fiber channel routes
US5495476A (en) Parallel algorithm to set up benes switch; trading bandwidth for set up time
EP0517512A2 (en) Computer system and method of establishing communication therein
JPH04232561A (ja) 多重並列コンピュータ・システム
JPH08185380A (ja) 並列計算機
GB1561557A (en) Channel-to-channel adapters
US4999771A (en) Communications network
KR102741034B1 (ko) 분리된 데이터 센터 자원 관리 방법 및 장치
US5420982A (en) Hyper-cube network control system having different connection patterns corresponding to phase signals for interconnecting inter-node links and between input/output links
JPH0139141B2 (enrdf_load_stackoverflow)
JPS62100854A (ja) ホスト・端末間通信方式
US5361388A (en) Message relaying system for a distributed processing system
JP2960454B2 (ja) 並列プロセッサのプロセッサ間データ転送装置
JP3137197B2 (ja) マルチプロセッサシステム
JPS6244808A (ja) Nc加工機械群の制御方法
JP2611388B2 (ja) データ処理装置
JPH01183761A (ja) 分散システムにおける空エリア共有化方式
JP3821377B2 (ja) 双方向リングネットワーク、ノード装置、および双方向リングネットワークのルーティング情報構成方法
JP2635635B2 (ja) 分散ノード間メモリ情報更新装置
JP2600017B2 (ja) 仮想計算機間の通信回線共有方式
Rössing Report on the Local Area Networks FFM-MCS and MICON
JPH05303558A (ja) アレイプロセッサのメッセージパケットルーティング方法および装置
JPS62286157A (ja) プロセツサ間デ−タ転送方式
JPH0376449A (ja) ループ型lanにおける回線交換方法