JPH01312855A - 空隙分離されたクロスオーバーの製造法および該方法により製造されたクロスオーバ - Google Patents

空隙分離されたクロスオーバーの製造法および該方法により製造されたクロスオーバ

Info

Publication number
JPH01312855A
JPH01312855A JP1093279A JP9327989A JPH01312855A JP H01312855 A JPH01312855 A JP H01312855A JP 1093279 A JP1093279 A JP 1093279A JP 9327989 A JP9327989 A JP 9327989A JP H01312855 A JPH01312855 A JP H01312855A
Authority
JP
Japan
Prior art keywords
crossover
layer
copper layer
copper
gap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1093279A
Other languages
English (en)
Japanese (ja)
Inventor
Dieter Dr Rer N Schlichenmaier
デイーター・シユリヒエンマイアー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bosch Telecom GmbH
Original Assignee
ANT Nachrichtentechnik GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ANT Nachrichtentechnik GmbH filed Critical ANT Nachrichtentechnik GmbH
Publication of JPH01312855A publication Critical patent/JPH01312855A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4685—Manufacturing of cross-over conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5381—Crossover interconnections, e.g. bridge stepovers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP1093279A 1988-04-15 1989-04-14 空隙分離されたクロスオーバーの製造法および該方法により製造されたクロスオーバ Pending JPH01312855A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3812494A DE3812494C1 (enExample) 1988-04-15 1988-04-15
DE3812494.7 1988-04-15

Publications (1)

Publication Number Publication Date
JPH01312855A true JPH01312855A (ja) 1989-12-18

Family

ID=6352014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1093279A Pending JPH01312855A (ja) 1988-04-15 1989-04-14 空隙分離されたクロスオーバーの製造法および該方法により製造されたクロスオーバ

Country Status (3)

Country Link
EP (1) EP0338190A3 (enExample)
JP (1) JPH01312855A (enExample)
DE (1) DE3812494C1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4226200C1 (en) * 1992-08-07 1993-05-06 Siemens Ag, 8000 Muenchen, De Forming air bridges to cross conductor paths on semiconductor integrated circuit - covering conducting path to be bridged with photo-resist layers, creating air gap in second layer using etching process and adding top conductive layer
US6294455B1 (en) * 1997-08-20 2001-09-25 Micron Technology, Inc. Conductive lines, coaxial lines, integrated circuitry, and methods of forming conductive lines, coaxial lines, and integrated circuitry

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4054484A (en) * 1975-10-23 1977-10-18 Bell Telephone Laboratories, Incorporated Method of forming crossover connections
US4289846A (en) * 1979-12-28 1981-09-15 General Electric Company Process for forming low-reactance interconnections on semiconductors
US4436766A (en) * 1981-05-15 1984-03-13 The United States Of America As Represented By The Secretary Of The Navy Plated bridge step-over connection for monolithic devices and method for making thereof
US4601915A (en) * 1984-09-24 1986-07-22 Motorola, Inc. Method of fabricating air supported crossovers
US4670297A (en) * 1985-06-21 1987-06-02 Raytheon Company Evaporated thick metal and airbridge interconnects and method of manufacture

Also Published As

Publication number Publication date
EP0338190A3 (de) 1991-03-06
DE3812494C1 (enExample) 1989-08-10
EP0338190A2 (de) 1989-10-25

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