JPH01302870A - Photosensor - Google Patents

Photosensor

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Publication number
JPH01302870A
JPH01302870A JP63133788A JP13378888A JPH01302870A JP H01302870 A JPH01302870 A JP H01302870A JP 63133788 A JP63133788 A JP 63133788A JP 13378888 A JP13378888 A JP 13378888A JP H01302870 A JPH01302870 A JP H01302870A
Authority
JP
Japan
Prior art keywords
amorphous semiconductor
bias voltage
semiconductor layer
metal electrodes
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63133788A
Other languages
Japanese (ja)
Inventor
Noritoshi Yamaguchi
文紀 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP63133788A priority Critical patent/JPH01302870A/en
Publication of JPH01302870A publication Critical patent/JPH01302870A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce an optical deterioration phenomenon to be caused in a PIN junction amorphous semiconductor layer connected in a mutually reverse direction and to obtain a stable characteristic by a method wherein a specific bias voltage is applied, via a metal electrode, to the amorphous semiconductor layer of a laminated body connected in the mutually reverse direction. CONSTITUTION:At least two laminated bodies (a), (b) composed of a PIN junction amorphous semiconductor layer 3 and of metal electrodes 4a, 4b to which a bias voltage is applied are connected in a mutually reverse direction via a transparent conductive film 2 on a transparent substrate 1 to which the transparent conductive film 2 has been applied. In such a photosensor, a bias voltage of 3 to 13V is applied, via the metal electrodes 4a, 4b, to the amorphous semiconductor layer 3 of said laminated bodies (a), (b) connected in the mutually reverse direction. For example, said metal electrodes 4a, 4b are formed of nickel to which an electrode and an external lead can be soldered easily; a solder layer 5 by a solder dip may be formed in advance on the metal electrodes 4a, 4b. In addition, it is more preferably that said bias voltage is set to 5 to 10V.

Description

【発明の詳細な説明】 〔産業の利用分野〕 本発明は光学的測定装置、光スイツチング素子などに用
いられる光センサーに関するものであり、特にP−1−
N接合の非晶質半導体層を用いた光センサーである。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an optical sensor used in an optical measuring device, an optical switching element, etc., and particularly relates to a P-1-
This is an optical sensor using an N-junction amorphous semiconductor layer.

〔発明の背景〕[Background of the invention]

非晶質半導体層は現在太陽電池、感光体ドラム、光セン
サーなどの光電変換装置、光デバイスに幅広くもちいら
れている。
Amorphous semiconductor layers are currently widely used in photoelectric conversion devices and optical devices such as solar cells, photosensitive drums, and optical sensors.

非晶質半導体層の層構成の一例として、光キャリア(正
孔や電子)生成層(一般に1層)の両側にP層とN層と
を配置したP−1−N接合したものがあり、光照射によ
り発生したキャリアを収集し、光起電力として発生して
いた。
An example of the layer structure of an amorphous semiconductor layer is a P-1-N junction in which a P layer and an N layer are placed on both sides of a photocarrier (hole or electron) generation layer (generally one layer). Carriers generated by light irradiation were collected and generated as photovoltaic force.

光電変換装置である光センサーは、この光起電力により
発生する光電流の量を検出し、入射光の強度を読み取る
フォトダイオド−型光センサーがあった。
The optical sensor, which is a photoelectric conversion device, is a photodiode type optical sensor that detects the amount of photocurrent generated by this photovoltaic force and reads the intensity of incident light.

また、P−1−N接合した非晶質半導体層を有する積層
体のダイオードが互いに逆向きに抱き合わされ、両積層
体間にバイアス電圧を印加する抱き合わせタイプの光セ
ンサ−(特願昭62−331620号)などがあった。
In addition, a tying-type optical sensor (Japanese Patent Application No. 1983-1981) is used in which diodes of a stacked body having P-1-N junction amorphous semiconductor layers are tied together in opposite directions, and a bias voltage is applied between both stacked bodies. 331620).

従来からP−1−N接合した非晶質半導体層を有する光
センサーは、非晶質半導体層がせいぜい1μm程度であ
ることから耐圧信頼性が悪く、1■以下程度の低いバイ
アス電圧を印加して使用していた。 また、P−I−N
接合した非晶質半導体層は、光照射により、スティブラ
ー・ロンスキル効果と言われる光劣化現象があり、初期
特性が20〜50%も低下することが知られていた。
Conventionally, optical sensors having an amorphous semiconductor layer in a P-1-N junction have poor breakdown voltage reliability because the amorphous semiconductor layer is about 1 μm at most, and a low bias voltage of about 1 μm or less cannot be applied. I was using it. Also, P-I-N
It has been known that the bonded amorphous semiconductor layer undergoes a photodegradation phenomenon called the Stibler-Ronskill effect when exposed to light, and its initial characteristics decrease by as much as 20 to 50%.

これは、太陽電池のみならず光センサーとしても、光照
射による局在準位密度の増大に伴う光導電率の低下現象
を招くものであった。
This leads to a phenomenon in which the photoconductivity decreases not only in solar cells but also in optical sensors due to the increase in localized level density due to light irradiation.

これらのことにより、光センサーなどの光電変換装置は
、使用経過に応じて特性が変化していくために、使用範
囲を大き(狭めてしまい、大きな欠点であった。
Due to these factors, the characteristics of photoelectric conversion devices such as optical sensors change as they are used, which increases (or narrows) the range of use, which is a major drawback.

そこで、本発明者は、鋭息研沿し、P−1−N接合した
非晶質半導体J―を有する抱き合わせタイプの光センサ
ーにおいて、−船釣に用いられるバイアス電圧の印加の
条件を変えることにより、光劣化現象を改善できること
を知見した。
Therefore, the present inventor developed a combination type optical sensor having a P-1-N junction of an amorphous semiconductor J by changing the conditions for applying a bias voltage used in boat fishing. It was found that the photodegradation phenomenon could be improved by this method.

〔本発明の目的〕[Object of the present invention]

本発明は、上述の知見に基づいて案出されたものであり
、その目的は互いに逆向に接続した前記P−1−N接合
した非晶質半導体層に発生ずる光劣化現象を低減し、安
定した特性が得られる光センサーを提供することにある
The present invention has been devised based on the above-mentioned knowledge, and its purpose is to reduce the photodegradation phenomenon that occurs in the P-1-N junction amorphous semiconductor layers connected in opposite directions, and to stabilize the amorphous semiconductor layers. The object of the present invention is to provide an optical sensor that has the following characteristics.

〔目的を達成するための具体的な手段〕本発明によれば
、上述の目的を達成するため、透明導電膜を被着した透
明基板上に、P−I−N接合した非晶質半導体層とバイ
アス電圧が印加される金属電極とから成る少なくとも2
つの積層体を、該透明導電膜を介して互いに逆向きに接
続した光センサーにおいて、互いに逆向に接続した前記
積層体の非晶質半導体層には、前記金属電極を介して3
〜13Vのバイアス電圧が印加される光センサーを提供
する。
[Specific Means for Achieving the Object] According to the present invention, in order to achieve the above-mentioned object, an amorphous semiconductor layer formed by P-I-N junction is formed on a transparent substrate coated with a transparent conductive film. and a metal electrode to which a bias voltage is applied.
In an optical sensor in which two laminates are connected in opposite directions to each other via the transparent conductive film, three amorphous semiconductor layers of the laminates connected in opposite directions are connected to each other through the metal electrode.
An optical sensor to which a bias voltage of ~13V is applied is provided.

〔作用〕[Effect]

上述の具体的な手段により、P−I−N接合した非晶質
半導体層を有する抱き合わせタイプの光センサーは、逆
バイアスとなる積層体の逆方向の光電流を検出するが、
その拡散電位以上の電位がバイアス電圧から印加される
と、検出される逆方向の光電流は光劣化の影響を受けな
い。これは、バイアス電圧により、生成されたキャリア
(正孔や電子)の収集効率が補われ、収集効率が向上す
るためと考えられる。
By the above-mentioned specific means, a tied-type optical sensor having an amorphous semiconductor layer with a P-I-N junction detects a photocurrent in the opposite direction of the stack, which is reverse biased.
When a potential higher than the diffusion potential is applied from the bias voltage, the detected photocurrent in the opposite direction is not affected by photodegradation. This is considered to be because the bias voltage compensates for the collection efficiency of generated carriers (holes and electrons), improving the collection efficiency.

〔実施例〕〔Example〕

以下、本発明の光センサーを図面に基づいて詳細に説明
する。
Hereinafter, the optical sensor of the present invention will be explained in detail based on the drawings.

第1図は本発明に係る光センサーの構造を示す断面構造
図である。
FIG. 1 is a cross-sectional structural diagram showing the structure of an optical sensor according to the present invention.

本発明の光センサーは、透明導電膜2を被着した透明基
板l上に、第1の導電型、第2の導電型、第3の導電型
を接合した、即ちP−I−N接合した非晶質半導体層3
及び金属電極4a、4bの積層体a、bを複数個形成し
て構成されている。
In the optical sensor of the present invention, a first conductivity type, a second conductivity type, and a third conductivity type are bonded on a transparent substrate l on which a transparent conductive film 2 is adhered, that is, a P-I-N bond is formed. Amorphous semiconductor layer 3
It is configured by forming a plurality of laminates a and b of metal electrodes 4a and 4b.

透明基板1はガラス、透光性セラミックなどから成り、
該透明基板lの一主面には透明導電膜2が被着されてい
る。
The transparent substrate 1 is made of glass, translucent ceramic, etc.
A transparent conductive film 2 is adhered to one main surface of the transparent substrate l.

透明導電膜2は酸化錫、酸化インジウム、酸化インジウ
ム錫などの金属酸化物膜で形成され、透明基板Iの一主
面の少なくとも積層体a、bに共通の膜となるように形
成されている。具体的には透明基板1の一生面上にマス
クを装着した後、上述の金属酸化物膜を被着したり、透
明基板1の一生面上に金属酸化物膜を被着した後、レジ
スト・エツチング処理したりして形成されている。
The transparent conductive film 2 is formed of a metal oxide film such as tin oxide, indium oxide, indium tin oxide, etc., and is formed to be a film common to at least the laminates a and b on one main surface of the transparent substrate I. . Specifically, after attaching a mask to the entire surface of the transparent substrate 1, the metal oxide film described above is deposited, or after depositing the metal oxide film to the entire surface of the transparent substrate 1, a resist film is applied. It is formed by etching.

非晶質半導体層3は、少な(とも金属電極4a、4bが
形成される積層体a、b部分には、第1の導電型、第2
の導電型、第3の導電型を接合、即ちP−1−N接合が
形成されている。具体的には、非晶質半導体層3はシラ
ン、ジシランなどのシリコン化合物ガスをグロー放電で
分解するプラズマCVD法や光CVD法等で被着される
非晶質シリコンなどから成り、P層はシランガスにジボ
ランなどのP型ドーピングガスを混入した反応ガスで形
成され、1層はシランガスを反応ガスとして形成され、
N層はシランガスにフォスフインなどのN型ドーピング
ガスを混入した反応ガスで形成される。
The amorphous semiconductor layer 3 is of a first conductivity type, a second conductivity type,
conductivity type and the third conductivity type are joined, that is, a P-1-N junction is formed. Specifically, the amorphous semiconductor layer 3 is made of amorphous silicon deposited by a plasma CVD method or a photo CVD method in which silicon compound gas such as silane or disilane is decomposed by glow discharge, and the P layer is made of amorphous silicon. It is formed using a reactive gas containing silane gas mixed with a P-type doping gas such as diborane, and one layer is formed using silane gas as a reactive gas.
The N layer is formed of a reactive gas containing silane gas mixed with an N-type doping gas such as phosphine.

尚、金属電極4a、4bが形成されない部分の非晶質半
導体層3はP−I−N接合している必要はない。
Note that the portions of the amorphous semiconductor layer 3 where the metal electrodes 4a and 4b are not formed do not need to be in a P-I-N junction.

金属電極4a、4bは、非晶質半導体層3上に所定形状
の間隔を置いて形成されている。具体的には、金属電極
4a、4bは非晶質半導体層3上にマスクを装着し、ニ
ッケル、アルミニウム、チタン、クロム等の金属を被着
したり、非晶質半導体層3上にニッケル、アルミニウム
、チタン、クロム等の金属膜を被着した後、レジスト・
エツチング処理したりして所定パターンに形成される。
The metal electrodes 4a and 4b are formed on the amorphous semiconductor layer 3 at predetermined intervals. Specifically, the metal electrodes 4a and 4b are formed by attaching a mask to the amorphous semiconductor layer 3 and depositing a metal such as nickel, aluminum, titanium, or chromium, or by depositing a metal such as nickel, aluminum, or After depositing a metal film of aluminum, titanium, chromium, etc., resist
It is formed into a predetermined pattern by etching.

尚、この金属電極4a、4bのレジスト・エツチング処
理に続き、金属電極4a、4bを侵さず且つ非晶質半導
体N3のみをエツチングする溶液に浸漬することにより
、上述のように金属電極4a、4bが形成されない部分
の非晶質半導体N3の一部(図では、N層)を除去でき
る。好ましい金属は、電極と外部リードとが容易に半田
付けできるニッケルであり、予め金属電極4a、4b上
に半田デツプによる半田層5を設けてもよい。
Incidentally, following the resist etching treatment of the metal electrodes 4a, 4b, the metal electrodes 4a, 4b are immersed in a solution that does not attack the metal electrodes 4a, 4b and etches only the amorphous semiconductor N3, thereby forming the metal electrodes 4a, 4b as described above. A part of the amorphous semiconductor N3 (the N layer in the figure) where the amorphous semiconductor N3 is not formed can be removed. A preferred metal is nickel, which allows the electrodes and external leads to be easily soldered, and a solder layer 5 of a solder depth may be provided on the metal electrodes 4a, 4b in advance.

そして、金属電極4a、4b間に外部回路(図示せず)
から一定のバイアス電圧を印加しておく。
An external circuit (not shown) is provided between the metal electrodes 4a and 4b.
A constant bias voltage is applied from .

上述の構成の光センサーは、P−1−N接合された積層
体a、bのダイオードが抱き合わされた構造になってい
る。
The optical sensor having the above-mentioned structure has a structure in which diodes of the stacked bodies a and b, which are connected in a P-1-N manner, are tied together.

今、積層体aの金属電極4aに+、積層体すの金属電極
4bに−でバイアス電圧をかけておくと、vt1m体a
側の非晶質半導体層3aには逆バイアス、積層体す側の
非晶質半導体層3bには順バイアスがかかることになる
Now, if we apply a + bias voltage to the metal electrode 4a of the laminate a and a - bias voltage to the metal electrode 4b of the laminate A, then the vt1m body a
A reverse bias is applied to the amorphous semiconductor layer 3a on the side, and a forward bias is applied to the amorphous semiconductor layer 3b on the side of the stack.

暗状態において、金属電極4a、4b間の抵抗は積層体
aの逆方向抵抗Raと積層体すの順方向抵抗Rbの和に
なり、金属電極4a、4b間に流れる電流は、該抵抗(
Ra十Rb)に対応する。
In the dark state, the resistance between the metal electrodes 4a and 4b is the sum of the reverse resistance Ra of the laminate a and the forward resistance Rb of the laminate A, and the current flowing between the metal electrodes 4a and 4b is equal to the resistance (
Ra + Rb).

上述の光センサーの透明基板1側より光照射される明状
態では、積層体a及び積層体すに光起電力が生じるが、
互いに逆電位であるため相殺され、実際には光起電流は
流れないものの、金属電極4aに+、金属電極4bに−
でバイアス電圧を印加されているので、積層体aに逆方
向光電流が発生する。なお、積層体すはダイオードの順
方向抵抗から成る抵抗体となる。
In the bright state where light is irradiated from the transparent substrate 1 side of the above-mentioned photosensor, a photovoltaic force is generated in the laminate a and the laminate.
Since the potentials are opposite to each other, they cancel each other out, and although no photovoltaic current actually flows, there is a positive current at the metal electrode 4a and a negative current at the metal electrode 4b.
Since a bias voltage is applied at , a reverse photocurrent is generated in the stack a. Note that the laminated body becomes a resistor consisting of a forward resistance of a diode.

そして、2つの金属電極4a、4b間の電流は積層体a
の金属電極4a−非晶質半導体層3aのN層−■層−P
層−透明導電膜2−積層体すの非晶質半導体層3bのP
層−■層−N層−金属電極4bに流れる。
Then, the current between the two metal electrodes 4a and 4b is
metal electrode 4a-N layer of amorphous semiconductor layer 3a-■ layer-P
Layer - Transparent conductive film 2 - P of the amorphous semiconductor layer 3b of the laminate
Flows into the layer-■ layer-N layer-metal electrode 4b.

ここで、光センサー全体において見かけ上、光照射によ
って抵抗が低下したことになり、光導電型センサーのよ
うにはたらく。これにより、照度−抵抗値特性がリニア
となり、T値が約1となる。
Here, the resistance of the entire optical sensor appears to be reduced by the light irradiation, and it functions like a photoconductive type sensor. As a result, the illuminance-resistance value characteristic becomes linear, and the T value becomes approximately 1.

本発明は、金属電極4a、4b間に印加するバイアス電
圧を、3〜13Vに設定することが重要である。特に5
〜IOVに設定することがよりこのましい。
In the present invention, it is important to set the bias voltage applied between the metal electrodes 4a and 4b to 3 to 13V. Especially 5
It is more preferable to set it to ~IOV.

本発明者は、上述の光センサーを用いて種々の実験をお
こなった。
The present inventor conducted various experiments using the above-mentioned optical sensor.

まず、上述の光センサーを金属電極4a、4b間にバイ
アス電圧を印加せず、端子開放してAM−1,100m
W/c+w2の光を100時間照射した(光センサ−A
)。また金属電極4a、4b間に通常用いられるバイア
ス電圧、1■を印加してAM−1,100mW/cm2
の光を100時間照射した(光センサ−B)。上記の光
劣化した光センサ−A及び光センサ−Bにバイアス電圧
をO〜20Vに変化させ、光センサ−A及び光センサ−
Bの光劣化前の抵抗値との変化率を測定した。
First, without applying a bias voltage between the metal electrodes 4a and 4b, the above-mentioned optical sensor was opened with its terminals opened, and the AM-1, 100 m
Irradiated with light of W/c+w2 for 100 hours (light sensor-A
). In addition, a bias voltage of 1cm, which is usually used between the metal electrodes 4a and 4b, is applied to generate AM-1, 100mW/cm2.
was irradiated with light for 100 hours (Photosensor-B). The bias voltage was changed from O to 20 V to the photo-degraded photosensor-A and photo-sensor-B, and the photo-sensor-A and photo-sensor-B were
The rate of change from the resistance value of B before photodeterioration was measured.

第2図は、その結果を示す特性図であり、横軸に変化さ
せたバイアス電圧の電位をしめし、縦軸に光劣化前(初
期状態)の抵抗値と比較した抵抗値増加率をしめす。な
お、測定には200ルツクスの光照度でおこなった。
FIG. 2 is a characteristic diagram showing the results, in which the horizontal axis shows the potential of the changed bias voltage, and the vertical axis shows the rate of increase in resistance value compared to the resistance value before photodegradation (initial state). Note that the measurement was performed at a light illuminance of 200 lux.

第2図から明らかなように、光劣化は、概ね端子開放し
て光を100時間照射した光センサ−Aの方が、1■の
バイアス電圧を印加して光を100時間照射した光セン
サ−Bよりも大きいことがわかる。
As is clear from Fig. 2, photodeterioration is generally worse for photosensor-A, which was irradiated with light for 100 hours with its terminals open, than for photosensor-A, which was irradiated with light for 100 hours with a bias voltage of 1. It can be seen that it is larger than B.

さらに重要なことは、光劣化した光センサー八及び光セ
ンサ−Bであっても、バイアス電圧の電位次第では、光
劣化前の初期状態の抵抗値と遜色のない使用が可能であ
ることである。即ち、バイアス電圧の電位を3〜13V
に設定して使用すると、初期状態の抵抗値と比較して1
0〜15%の抵抗値増加率におさえられ、さらに、バイ
アス電圧の電位を5〜IOVに設定して使用すると、光
劣化した光センサ−A、Bでも、初期状態の抵抗値と比
較して抵抗値増加率(明電流低下率)が0と、全く光劣
化が観測されない状態とすることができる。
What is more important is that even if photo-degraded photosensor 8 and photo-sensor-B are used, depending on the potential of the bias voltage, it is possible to use them with the same resistance value as the initial state before photodeterioration. . That is, the potential of the bias voltage is set to 3 to 13V.
When used with the setting set to
If the resistance value increase rate is suppressed to 0 to 15%, and the bias voltage potential is set to 5 to IOV, even optical sensors A and B that have been degraded by light will have a higher resistance value than the initial state. A state in which the resistance value increase rate (bright current decrease rate) is 0 and no photodeterioration is observed can be achieved.

なお、バイアス電圧の電位を13V以上に設定すると、
抵抗値増加率が次第に顕著となるが、これは、2つの金
属電極4a、4b間に非晶質半導体層を介して直接流れ
る横力同電両が存在が顕著となり、非晶質半導体層3の
1層の光導電率の増加が出てくるためと考えられる。
Note that if the potential of the bias voltage is set to 13V or higher,
The rate of increase in resistance value gradually becomes remarkable, but this is because the existence of a lateral force that flows directly between the two metal electrodes 4a and 4b through the amorphous semiconductor layer becomes noticeable, and the amorphous semiconductor layer 3 This is thought to be due to an increase in the photoconductivity of one layer.

本発明によれば、光劣化による抵抗値増加率を低下せし
めるために、バイアス電圧を3〜13Vに設定すること
が有効であるが、さらに、非晶質半導体層の1層の厚み
を1〜5μmと厚く設定すると、バイアス電圧を3〜1
3Vの電圧に対して信頼性を向上させることができる。
According to the present invention, in order to reduce the rate of increase in resistance value due to photodeterioration, it is effective to set the bias voltage to 3 to 13 V. If the thickness is set to 5 μm, the bias voltage will be 3 to 1
Reliability can be improved for a voltage of 3V.

尚、上述の光センサーは、P−I−N接合された積層体
a、bのダイオードが抱き合わされた構造になっている
が、金属電極4a、4bが形成されていない部分の非晶
質半導体層の一部又は全部を除去してkJw体a、bの
ダイオードを抱き合わせにしても、さらに、同一基板上
にバイアス電圧が印加される一対の積層体a、bを複数
個形成しても構わない。
The above-mentioned optical sensor has a structure in which the diodes of the laminated bodies a and b connected by P-I-N are tied together, but the amorphous semiconductor in the part where the metal electrodes 4a and 4b are not formed. It is also possible to remove part or all of the layers to combine the diodes of kJw bodies a and b, or to form a plurality of pairs of laminated bodies a and b to which a bias voltage is applied on the same substrate. do not have.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明は透明導電膜を被着した透明基板
上に、P−1−N接合した非晶質半導体層とバイアス電
圧が印加される金属電極とから成る積層体を形成した光
電変換装置において、該全屈電極間に、3〜13Vのバ
イアス電圧が印加したため、P−I−N接合した非晶質
半導体層に発生する光劣化現象を低減し、光導電率の低
下を抑え、安定した特性が得られ、光センサーの使用用
途を拡大できるものとなる。
As described above, the present invention provides a photovoltaic device in which a laminate consisting of a P-1-N bonded amorphous semiconductor layer and a metal electrode to which a bias voltage is applied is formed on a transparent substrate coated with a transparent conductive film. In the conversion device, a bias voltage of 3 to 13 V was applied between the fully bent electrodes, reducing the photodegradation phenomenon that occurs in the P-I-N junction amorphous semiconductor layer and suppressing the decrease in photoconductivity. , stable characteristics can be obtained, and the applications of optical sensors can be expanded.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る光センサーの構造を示す断面図で
ある。第2図は、光センサーのバイアス電工の電位と光
劣化前の初期状態の抵抗値と比較した抵抗値増加率の関
係をしめず特性図である。 ■、31・・・・・透明基板 2.32・・・−・透明導電膜 3.33・・・・・非晶質半導体層 4a、4b・・・・金属電極 a、b・・・・・・積層体
FIG. 1 is a sectional view showing the structure of an optical sensor according to the present invention. FIG. 2 is a characteristic diagram showing the relationship between the bias electric potential of the optical sensor and the rate of increase in resistance value compared to the resistance value in the initial state before photodeterioration. ■, 31...Transparent substrate 2.32...-Transparent conductive film 3.33...Amorphous semiconductor layer 4a, 4b...Metal electrodes a, b...・・Laminated body

Claims (1)

【特許請求の範囲】  透明導電膜を被着した透明基板上に、P−I−N接合
した非晶質半導体層とバイアス電圧が印加される金属電
極とから成る少なくとも2つの積層体を、該透明導電膜
を介して互いに逆向きに接続した光センサーにおいて、 互いに逆向に接続した前記積層体の非晶質半導体層には
、前記金属電極を介して3〜13Vのバイアス電圧が印
加されることを特徴とする光センサー。
[Claims] At least two laminates each consisting of a P-I-N bonded amorphous semiconductor layer and a metal electrode to which a bias voltage is applied are formed on a transparent substrate coated with a transparent conductive film. In the optical sensor connected in opposite directions to each other via a transparent conductive film, a bias voltage of 3 to 13 V is applied to the amorphous semiconductor layers of the stacked body connected in opposite directions to each other through the metal electrode. A light sensor featuring
JP63133788A 1988-05-31 1988-05-31 Photosensor Pending JPH01302870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63133788A JPH01302870A (en) 1988-05-31 1988-05-31 Photosensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63133788A JPH01302870A (en) 1988-05-31 1988-05-31 Photosensor

Publications (1)

Publication Number Publication Date
JPH01302870A true JPH01302870A (en) 1989-12-06

Family

ID=15113025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63133788A Pending JPH01302870A (en) 1988-05-31 1988-05-31 Photosensor

Country Status (1)

Country Link
JP (1) JPH01302870A (en)

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