JPH01293448A - Microcomputer - Google Patents

Abstract

PURPOSE:To automatically detect the fact that an execution is normally started from a prescribed address to be started at the time of activation by checking the contents of a consistent condition storage means at a prescribed check timing after the activation. CONSTITUTION:When the execution is started from a normal execution starting address at the time of the activation, an address consistency detecting means 2 detects a consistent condition, and stores it into a consistent condition memory means 3. On the other hand, when the execution is started from the address other than the normal execution starting address at the time of the activation, since the address consistency detecting means 2 does not detect the consistent condition, the consistent condition memory means 3 remains in the inconsistent condition. Thus, by checking the contents of the consistent condition memory means 3 at the prescribed check timing after the activation, whether or not the execution is started from the normal execution starting address can be detected.

Description

DETAILED DESCRIPTION OF THE INVENTION ta) Industrial Application Field This invention relates to a microcomputer that sequentially executes programs stored in memory.

Cb) Conventional technology In general, microcombiners carry out predetermined processing contents by RO.
By writing it in advance to M or the like, it is incorporated into various electronic devices as a controller that performs specific processing.

When designing a device that uses such a microcomputer to control electronic devices, the following points should be noted:
The problem is how to prevent abnormal operations from occurring. The main causes of abnormal operation of microcomputers are instantaneous power outages, external noise, etc., but measures are generally taken in the hardware to prevent such influences. However, there are cases where the power supply voltage fluctuates slowly or unexpectedly strong noise occurs, and it is not always possible to ensure sufficient reliability against abnormal operation using hardware measures alone.

Therefore, when an abnormal operation occurs, means are also used to immediately detect this and stop or restart the operation. For example, a watchdog timer is used to detect the occurrence of an abnormal operation. This is done by providing a counter with a predetermined number of bits, a circuit that generates a timing signal to count up this counter at fixed time intervals, and a circuit that resets the microcomputer when the count value reaches a predetermined value. A process for resetting the timer at predetermined time intervals is inserted. Therefore, when the program is running normally, the timer will not time up and the microcomputer will not be reset. However, if it runs abnormally for some reason, the program will not run correctly and the timer will not be reset. When a certain period of time elapses without any processing being executed, the timer times up and the microcomputer is forcibly reset.

(C) Problems to be Solved by the Invention However, conventional microcomputers that use such a watchdog timer to detect abnormal operations have the following problems.

FIG. 2 is a flowchart showing an example of the processing procedure of the microcomputer. When the microcomputer is powered on and the ACL circuit is activated, the microcomputer automatically starts execution from the execution start address, first performs predetermined initial settings, and then performs process A (nl
-=n2). Subsequently, the timer of the watchdog timer is reset and a predetermined condition is determined (n3-n4). If this judgment is No, perform process B and return to n2 again (n5
→n2). If the condition judgment at n4 is YES, processing C is performed and the timer is reset (n6-n7). If you reset the timer at an appropriate timing in this way, you will not be forced to reset by the watchdog timer, but if for some reason the microcomputer starts running from the middle of the program, depending on the conditions, The timer may be reset normally without causing a complete runaway. For example, in the example shown in FIG. 2, execution may start from n2 without initializing nl, and a loop from 02 to n5 may be executed. However, because the initial settings of nl have not been performed, nl
It is also possible that the conditional judgment in step 4 is always NO and this loop is repeated forever. In order to solve this kind of problem, it is necessary to create a program to confirm that the execution start address at startup is normal, but this requires the entire program to become complicated and There was also the problem of increased capacity.

SUMMARY OF THE INVENTION An object of the present invention is to provide a microcomputer that can detect whether or not execution is started from a normal address at startup, thereby preventing the continuation of abnormal operations.

((0) Means for Solving the Problems The microcomputer of the present invention includes means for storing a normal execution start address at startup, and an address matching means for detecting a match between the normal execution start address and the contents of a program counter. a detecting means; a matching state storing means for storing that the address matching detecting means has detected a matching state; and a storage content checking means for checking the contents of the matching state storing means at a predetermined check timing after activation. It is characterized by the fact that it is equipped with

(e) Effect The microcomputer of the present invention is provided with means for storing a normal execution start address at startup, and the address error detection means detects a match between the normal execution start address and the contents of the program counter. I do. Also,
The match state storage means stores that the address match detection means has detected a match state, and the storage content check means checks the contents of the match state storage means at a predetermined timing after activation. Therefore, if execution is started from a normal execution start address at startup, the address match detection means will detect a match state and this will be stored in the match state storage means, but at startup, an address other than the normal execution start address will be detected. If execution is started from , the address match detection means does not detect a match state, so the match state storage means remains in a mismatch state.

Thereby, by checking the contents of the coincidence state storage means at a predetermined check timing after startup, it is possible to detect whether or not execution has started from a normal execution start address. For example, by configuring a circuit to forcibly reset the microcomputer based on the result of the memory content checking means, execution can be forcibly started from a normal execution start address.

(f) Embodiment FIG. 1 is a circuit diagram of the main part of a microcomputer which is an embodiment of the present invention. In the figure, 1 is a program counter, 2 is an NOR gate, 3 is a latch circuit, 4 is an inverter, and 5 is an AND gate. In the example shown in the figure, program counter 1 has a 10-bit configuration, and the CPU
The address of the instruction to be executed is stored, and is automatically counted up (+1) at the instruction execution stage. However, in the case of a jump instruction, the jump destination address is stored during the execution stage. NOR gate 2 calculates the negative OR of each bit of program counter l. Therefore, the contents of program counter 1 are oooo.

The output is set to 1 only when oooooo. The latch circuit 3 temporarily stores the output state of the NOR gate 2. The AND gate 5 outputs the negation signal of the latch circuit 3 and the second bit of the program counter 1 (from the lowest bit to 31
) and the it-th), and the result is generated as a microcomputer reset (No. 8).

In the configuration shown above, the NOR gate 2 corresponds to "means for storing a normal execution start address" and "address coincidence detection means" according to the present invention, and the latch circuit 3 corresponds to "means for storing a normal execution start address" and "means for detecting address coincidence" according to the present invention.
The A N D gate 5 corresponds to “coincidence state storage means”, and the A N D gate 5 corresponds to “coincidence state storage means”.
It corresponds to "memory content checking means". That is, first, the power is turned on to the microcomputer and the ACL (
When the auto clear (auto clear) circuit is activated, the content of the program counter 1 becomes ooooooooooo, so the output of the NOR gate 2 becomes 1, and this state is stored in the latch circuit 3. Therefore, the output of inverter 4 is zero. Therefore, even if the second bit of the program counter 1 becomes 1 as the programs are sequentially executed thereafter, the output of the AND gate 5 remains O and no reset is performed.

If the normal execution start address at startup i.e. oooo
NOR if execution did not start from ooooooo
The output of the gate 2 becomes 1, and the state is stored in the latch circuit 3. After that, when the content of the second bit of the program counter becomes 1, the output of the AND gate 5 becomes 1, and the entire microcomputer is forcibly reset.

This changes the contents of program counter 1 to 000ooo
oooo, and execution starts from the normal address.

In addition, in the example, the entire microcomputer was forcibly reset when an abnormal state was detected, but
Alternatively, for example, the program may be stopped and an abnormal state may be notified.

(Effects of g1 Invention As described above, according to this invention, it is possible to automatically detect that execution has started normally from a predetermined address that should be started at startup. It is possible to detect an abnormal operating condition without increasing the amount of noise, and it is possible to prevent accidents caused by abnormal operation.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of the main parts of a microcomputer that is an embodiment of the present invention. FIG. 2 is a flowchart showing an example of a processing procedure performed by a conventional micro-combiner using a watchdog timer.

Claims (1)

[Claims] (1) means for storing a normal execution start address at startup; address match detection means for detecting a match between this normal execution start address and the contents of the program counter; and the address match detection means detects a matching state. 1. A microcomputer comprising: a coincidence state storage means for storing information about the coincidence state storage means; and a storage content checking means for checking the contents of the coincidence state storage means at a predetermined check timing after startup.