JPH0358205A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPH0358205A
JPH0358205A JP1194762A JP19476289A JPH0358205A JP H0358205 A JPH0358205 A JP H0358205A JP 1194762 A JP1194762 A JP 1194762A JP 19476289 A JP19476289 A JP 19476289A JP H0358205 A JPH0358205 A JP H0358205A
Authority
JP
Japan
Prior art keywords
power supply
supply voltage
state
data
source voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1194762A
Other languages
Japanese (ja)
Other versions
JP2978508B2 (en
Inventor
Kazuto Tanigawa
一人 谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP1194762A priority Critical patent/JP2978508B2/en
Publication of JPH0358205A publication Critical patent/JPH0358205A/en
Application granted granted Critical
Publication of JP2978508B2 publication Critical patent/JP2978508B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To shorten the restart time of a prescribed operation by detecting the fluctuation of a source voltage set at an operation stopping state, and preserving the content of a memory register, etc., without initializing when no source voltage goes less than a constant voltage while the operation stopping state is set. CONSTITUTION:A microcomputer makes a source voltage fluctuation detection circuit 2 monitor the fluctuation of the source voltage after interrupting the execution of a program instruction with a stopping signal. When a state is shifted from a stopping state to an operating state, a data setting signal 11 on a program counter 12 is generated. When the state is shifted to the operating state without setting the source voltage fluctuation detection circuit 2 at this time, data setting on the program counter is prohibited with AND gates 9 and 10 even when the data setting signal 11 on the program counter 12 is generated, thereby, the content of the program counter is held. In such a way, a time required for the start of the prescribed operation can be reduced.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は、マイクロコンピュータに関するものである。[Detailed description of the invention] [Industrial application fields] The present invention relates to a microcomputer.

[従来の技術コ 従来、マイクロコンピュータの動作停止期間中に電源電
圧が所定電圧以下に低下した場合には、内蔵されている
メモリレジスタ等に保持されたデータピットの状態は不
定になる。これに対して、電源電圧が所定電圧以上に保
たれていれば内蔵されたメモリレジスタ等のデータピッ
トは安定に保持される。従来のマイクロコンピュータは
前述のように電源電圧に依りレジスタ等のデータが2つ
の状態のいずれかになるにもかかわらず動作停止状態か
ら動作状態への移行の際は、使用電源電圧の変化の有無
に関わらず、常にメモリレジスタ等を初期化してしまう
ようになっていた。
[Prior Art] Conventionally, when the power supply voltage drops below a predetermined voltage during a period when a microcomputer is not operating, the state of data pits held in a built-in memory register or the like becomes undefined. On the other hand, if the power supply voltage is maintained at a predetermined voltage or higher, data pits in built-in memory registers, etc. are stably held. As mentioned above, in conventional microcomputers, although the data in registers etc. can be in one of two states depending on the power supply voltage, when transitioning from the stopped state to the operating state, it is necessary to check whether or not there is a change in the power supply voltage used. Memory registers etc. were always initialized regardless of the situation.

[発明が解決しようとする問題点コ 従来の回路では動作停止状態から動作状態への移行の際
にメモリレジスタ等の状態をすべて初期化してしまうの
で、動作に必要な状態をプログラムによって再設定しな
ければならず、プログラムが長大になるうえ、所定の動
作を開始できるまでに長時間を要するという欠点がある
[Problems to be solved by the invention] In conventional circuits, all the states of memory registers etc. are initialized when transitioning from a stopped state to an operating state, so it is necessary to reset the states necessary for operation by a program. This has disadvantages in that the program becomes long and it takes a long time to start a predetermined operation.

[発明の従来技術に対する相違点コ 上述した従来の回路に対し、本発明は動作停止期間中に
電源電圧が指定された電圧より低下しなければプログラ
ムによりメモリレジスタ等の初期化をすることなく直ち
に所定の動作状態に早期に移行できるという相違点を有
する。
[Differences between the invention and the prior art] In contrast to the above-mentioned conventional circuits, the present invention is capable of immediately starting a program without initializing memory registers, etc., if the power supply voltage does not drop below a specified voltage during the operation stop period. The difference is that it is possible to shift to a predetermined operating state quickly.

[問題点を解決するための手段] 本発明の要旨は、プログラム命令の実行中に停止信号に
応答して上記プログラム命令の実行を中断し、上記停止
信号の解除後にプログラム命令の実行を再開するマイク
ロコンピュータにおいて、プログラム命令の実行に必要
なデータコードを保持するデータ保持手段と、プログラ
ム命令の実行を中断している間に電源電圧の変動を監視
し、該変動時には電源電圧の変動を記憶する電源電圧変
動検出回路と、プログラム命令の再開時に電源電圧変動
検出回路から出力される電源電圧の有無を表す制御信号
に応答し、上記データ保持手段にデータコードの再設定
をするか否かを判別し、実行するデータ再設定手段を有
することである。
[Means for solving the problem] The gist of the present invention is to suspend execution of the program instruction in response to a stop signal during execution of the program instruction, and resume execution of the program instruction after the stop signal is released. In a microcomputer, data holding means holds data codes necessary for executing program instructions, and monitors fluctuations in power supply voltage while suspending execution of program instructions, and stores fluctuations in power supply voltage when such fluctuations occur. Determines whether or not to reset the data code in the data holding means in response to the power supply voltage fluctuation detection circuit and a control signal indicating the presence or absence of the power supply voltage output from the power supply voltage fluctuation detection circuit when the program instruction is restarted. and has a data resetting means for executing the data resetting.

[発明の作用コ 上記マイクロコンピュータは停止信号によりプログラム
命令の実行を中断した後に、電源電圧変動検出回路に電
源電圧の変動を監視させる。もし、変動があれば停止信
号の解除後にデータ再設定手段がプログラム命令の実行
に必要なデータコードの再設定を実行し、変動がなけれ
ば、データコードの再設定を行うことなくプログラム命
令の実行を再開する。
[Operation of the Invention] After the above-mentioned microcomputer interrupts the execution of the program instruction by the stop signal, it causes the power supply voltage fluctuation detection circuit to monitor fluctuations in the power supply voltage. If there is a change, the data resetting means resets the data code necessary to execute the program command after the stop signal is released, and if there is no change, the program command is executed without resetting the data code. resume.

[実施例コ 次に本発明の一実施例を第1図を用いて説明する。[Example code] Next, one embodiment of the present invention will be described with reference to FIG.

第1図において1は電源、2は動作停止状態で電源電圧
がある一定電圧以下に低下し(第2図のBの状態)、そ
の後電源電圧が回復したとき(第2図のCの状態)必ず
一方向にセットされる電源電圧変動検出回路をそれぞれ
示している。
In Fig. 1, 1 is the power supply, and 2 is the operation stop state when the power supply voltage drops below a certain voltage (state B in Fig. 2), and then when the power supply voltage is restored (state C in Fig. 2). Each figure shows a power supply voltage fluctuation detection circuit that is always set in one direction.

このフリップフロップ2を以下詳細に説明する。This flip-flop 2 will be explained in detail below.

3はP型エンハンスメント型トランジスタ、4はN型エ
ンハンスメント型トランジスタ、5はインJ となり、動作状態でハイレベル(第9図のEの状態)と
なる信号である。停止状態で電源電圧が動作状態と同じ
電圧の場合(第2図のAの状態)では3と4が導通ずる
が3と4の抵抗比により3と4の接点Nにはハイレベル
が出力され、5の出力はロウレベルとなり、6の出力も
ロウレベルとなる。停止状態で電源電圧が3と4の抵抗
比で決定される一定電圧より低下すれば(第2図のBの
状態)5の人力がロウレベルとなり6の出力はハイレベ
ルとなる(この状態を2がセットされた状態とする)。
Reference numeral 3 indicates a P-type enhancement type transistor, 4 indicates an N-type enhancement type transistor, and 5 indicates an in-J signal, which is at a high level in the operating state (state E in FIG. 9). When the power supply voltage is the same voltage as in the operating state in the stopped state (state A in Figure 2), 3 and 4 become conductive, but due to the resistance ratio of 3 and 4, a high level is output to the contact N of 3 and 4. , 5 are at low level, and the output of 6 is also at low level. If the power supply voltage drops below the constant voltage determined by the resistance ratio of 3 and 4 in the stopped state (state B in Figure 2), the human power of 5 becomes low level and the output of 6 becomes high level (this state is changed to 2). is set).

以下の説明の便宜上、12を8ビットのフリップフロツ
ブによって構成されるプログラムカウンタで自身の値に
対して加算減算が可能で、かつ外からのデータによって
値を設定することができ、マイクロコンピュータ等のプ
ログラムを格納するメモリ(図示せず)を順次指示して
処理の流れを指示できるものとする。9,10はアンド
ゲートで、11はプログラムカウンタ12へのデータ設
のEの状態)、プログラムカウンタ12へのデータ設定
信号l1が発生する。このとき電源電圧変動検出回路2
がセットされていれば、アンドゲート9とアンドゲート
10およびデータ設定信号11によって、プログラムカ
ウンタ12はOOHに設定され、00Hよりプログラム
を実行する。もし、フリップフロツブ2をセットするこ
となく動作状態に移行すれは、プログラムカウンタ12
へのデータ設定信号11が発生してもアンドゲート9お
よび10によってプログラムカウンタへのデータ設定が
禁止され、プログラムカウンタの内容は保持され、その
内容にしたがって処理を再開でき、動作状態復帰時の特
殊なプログラム処理が不要となる。
For the convenience of the following explanation, a program counter consisting of a 12-bit flip-flop is capable of adding and subtracting its own value, and the value can be set by external data. It is assumed that the flow of processing can be instructed by sequentially instructing a memory (not shown) that stores the program. 9 and 10 are AND gates, and 11 is the state of E for setting data to the program counter 12), and a data setting signal l1 to the program counter 12 is generated. At this time, the power supply voltage fluctuation detection circuit 2
is set, the program counter 12 is set to OOH by the AND gates 9 and 10 and the data setting signal 11, and the program is executed from 00H. If the flip-flop 2 is not set to the operating state, the program counter 12
Even if data setting signal 11 is generated, data setting to the program counter is prohibited by AND gates 9 and 10, the contents of the program counter are held, and processing can be resumed according to the contents, and special No additional program processing is required.

上記実施例では、アンドゲー}9,10がデータ再設定
手段100を構成する。
In the above embodiment, the &games 9 and 10 constitute the data resetting means 100.

[発明の効果コ 以上説明したように本発明は、動作停止状態中の電源電
圧の変動を検出して、動作停止状態中に電源電圧がある
一定電圧以下に低下しなければ、メモリレジスタ等の内
容を初期化せずに保存することにより、停止状態から動
作状態への移行時にプログラムによってメモリレジスタ
等の内容を再設定し直す必要がなくなり、所要の動作の
再開にかかる時間が削減できる効果がある。
[Effects of the Invention] As explained above, the present invention detects fluctuations in the power supply voltage during the operation stop state, and if the power supply voltage does not drop below a certain voltage during the operation stop state, the memory register, etc. By saving the contents without initializing them, there is no need to reset the contents of memory registers, etc. by program when transitioning from a stopped state to an operating state, which has the effect of reducing the time required to resume the desired operation. be.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路図、第2図は電源
電圧の変動を示す波形図、第3図は停止状態から動作状
態への移行を示す信号の波形図である。 1・・ ・ ・・電源、 2・・・・・電源電圧変動検出回路、 3・・・・・P型エンハンスメントトランジスタ、4・
・・・・N型エンハンスメントトランジスタ、5・・・
・・インバータ、 6・・・・・R−Sフリップフロツブ、7・・・・・電
源投入直後に2をリセットするためのリセット信号、 8・・・・停止状態と動作状態の遷移を示す信号、9,
10・・・・・アンドゲート、 11・・・プログラムカウンタのデータ設定信号、12
・・・プログラムカウンタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram showing fluctuations in power supply voltage, and FIG. 3 is a waveform chart of signals showing transition from a stopped state to an operating state. 1... Power supply, 2... Power supply voltage fluctuation detection circuit, 3... P-type enhancement transistor, 4...
...N-type enhancement transistor, 5...
...Inverter, 6...R-S flip-flop, 7...Reset signal for resetting 2 immediately after power is turned on, 8...Indicates transition between stop state and operating state. signal, 9,
10...AND gate, 11...Program counter data setting signal, 12
...Program counter.

Claims (1)

【特許請求の範囲】 プログラム命令の実行中に停止信号に応答して上記プロ
グラム命令の実行を中断し、上記停止信号の解除後にプ
ログラム命令の実行を再開するマイクロコンピュータに
おいて、 プログラム命令の実行に必要なデータコードを保持する
データ保持手段と、 プログラム命令の実行を中断している間に電源電圧の変
動を監視し、該変動時には電源電圧の変動を記憶する電
源電圧変動検出回路と、 プログラム命令の再開時に電源電圧変動検出回路から出
力される電源電圧の有無を表す制御信号に応答し、上記
データ保持手段にデータコードの再設定をするか否かを
判別し、実行するデータ再設定手段を有することを特徴
とするマイクロコンピュータ。
[Scope of Claims] A microcomputer that interrupts execution of the program instruction in response to a stop signal during execution of the program instruction, and resumes execution of the program instruction after the stop signal is released, comprising: a data holding means for holding a data code; a power supply voltage fluctuation detection circuit for monitoring power supply voltage fluctuations while the execution of a program instruction is interrupted and storing the fluctuations in the power supply voltage at the time of the fluctuation; It has data resetting means for determining whether or not to reset the data code in the data holding means in response to a control signal indicating the presence or absence of the power supply voltage output from the power supply voltage fluctuation detection circuit at the time of restart. A microcomputer characterized by:
JP1194762A 1989-07-27 1989-07-27 Microcomputer Expired - Lifetime JP2978508B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1194762A JP2978508B2 (en) 1989-07-27 1989-07-27 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1194762A JP2978508B2 (en) 1989-07-27 1989-07-27 Microcomputer

Publications (2)

Publication Number Publication Date
JPH0358205A true JPH0358205A (en) 1991-03-13
JP2978508B2 JP2978508B2 (en) 1999-11-15

Family

ID=16329816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1194762A Expired - Lifetime JP2978508B2 (en) 1989-07-27 1989-07-27 Microcomputer

Country Status (1)

Country Link
JP (1) JP2978508B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6438708B1 (en) 1997-11-07 2002-08-20 Hitachi, Ltd. Information processing apparatus that can hold internal information

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6438708B1 (en) 1997-11-07 2002-08-20 Hitachi, Ltd. Information processing apparatus that can hold internal information
US6523133B2 (en) 1997-11-07 2003-02-18 Hitachi, Ltd, Information processing apparatus that can hold internal information

Also Published As

Publication number Publication date
JP2978508B2 (en) 1999-11-15

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