JPH01292894A - Thick film hybrid integrated circuit - Google Patents

Thick film hybrid integrated circuit

Info

Publication number
JPH01292894A
JPH01292894A JP63123114A JP12311488A JPH01292894A JP H01292894 A JPH01292894 A JP H01292894A JP 63123114 A JP63123114 A JP 63123114A JP 12311488 A JP12311488 A JP 12311488A JP H01292894 A JPH01292894 A JP H01292894A
Authority
JP
Japan
Prior art keywords
thick
circuit boards
thick film
film printed
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63123114A
Other languages
Japanese (ja)
Inventor
Junichi Kono
淳一 河野
Hironori Shimoda
下田　洋紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63123114A priority Critical patent/JPH01292894A/en
Publication of JPH01292894A publication Critical patent/JPH01292894A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

PURPOSE:To prevent electrical and magnetic induction from being generated mutually between thick-film printed-circuit boards by providing a spacer at the bonding part of the printed-circuit boards. CONSTITUTION:A surface mounting parts 4 are mounted on two thick-film printed-circuit boards 1 and 2, a spacer 6 is sandwiched and applied to between the thick-film printed-circuit boards 1 and 2, and a clip terminal 5 for external connection is mounted. Thus, by inserting the spacer 6, when applying electrical and magnetic induction thick-film printed-circuit boards between the thick-film printed-circuit boards 1 and 2, generation of electrical and magnetic induction between the thick-film printed-circuit boards can be prevented by inserting spacer on the bonding surface.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は厚膜混成集積回路に関し、特に２枚の基板をは
り合せな厚膜混成集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thick film hybrid integrated circuit, and more particularly to a thick film hybrid integrated circuit in which two substrates are bonded together.

〔従来の技術〕[Conventional technology]

従来、この種の厚膜混成集積回路は、第２図の斜視図に
示すように、２枚の厚膜印刷基板１，２に表面実装部品
４を搭載し、接着剤３によって厚膜印刷基板１，２を隙
間なくはり合わせ、外部接続用のクリップ端子５を取付
けた構成になっていた。Conventionally, this type of thick film hybrid integrated circuit has been constructed by mounting a surface mount component 4 on two thick film printed circuit boards 1 and 2, and attaching the thick film printed circuit board using an adhesive 3, as shown in the perspective view of FIG. 1 and 2 were glued together without any gaps, and a clip terminal 5 for external connection was attached.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の厚膜混成集積回路は、２枚の厚膜印刷基
板の間が接近しているので、相互に電気的及び磁気的誘
導を受けやすいという欠点がある。The above-mentioned conventional thick film hybrid integrated circuit has a drawback in that the two thick film printed substrates are close to each other and are susceptible to mutual electrical and magnetic induction.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の厚膜混成集積回路は、２枚の基板をはり合わせ
た厚膜混成集積回路において、前記基板の接合部分にス
ペーサを有している。The thick film hybrid integrated circuit of the present invention is a thick film hybrid integrated circuit in which two substrates are bonded together, and has a spacer at the joint portion of the substrates.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例の斜視図である。FIG. 1 is a perspective view of an embodiment of the present invention.

第１図に示すように、２枚の厚膜印刷基板１゜２に表面
実装部品４を搭載し、厚膜印刷基板１゜２の間にスペー
サ６を挟んではり合せ、外部接続用のクリップ端子５を
取付けている。As shown in Fig. 1, surface mount components 4 are mounted on two thick-film printed circuit boards 1゜2, spacers 6 are sandwiched between the two thick-film printed circuit boards 1゜2, and the spacer 6 is inserted between the two thick-film printed circuit boards 1゜2. Terminal 5 is installed.

このようにスペーサ６を挿入することにより、厚膜印刷
基板１，２間の電気的及び磁気的誘導の発生を防止でき
る。By inserting the spacer 6 in this manner, it is possible to prevent electrical and magnetic induction between the thick film printed substrates 1 and 2.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、２枚の厚膜印刷基板をは
り合わせる際、接着面にスペーサを挿入することにより
、厚膜印刷基板相互間の電気的及び磁気的誘導が発生す
ることを防止できる効果がある。As explained above, the present invention prevents electrical and magnetic induction between the thick film printed boards by inserting a spacer into the bonding surface when two thick film printed boards are bonded together. There is an effect that can be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例の斜視図、第２図は従来の厚
膜混成集積回路の一例の斜視図である。 １．２・・・厚膜印刷基板、３・・・接着剤、４・・・
表面実装部品、５・・・クリップ端子、６・・・スペー
サ。 係１図FIG. 1 is a perspective view of an embodiment of the present invention, and FIG. 2 is a perspective view of an example of a conventional thick film hybrid integrated circuit. 1.2... Thick film printed board, 3... Adhesive, 4...
Surface mount component, 5... clip terminal, 6... spacer. Figure 1

Claims (1)

【特許請求の範囲】[Claims] 　２枚の基板をはり合わせた厚膜混成集積回路において
、前記基板の接合部分にスペーサを有することを特徴と
する厚膜混成集積回路。1. A thick film hybrid integrated circuit comprising two substrates glued together, the thick film hybrid integrated circuit comprising a spacer at a joint portion of the substrates.
JP63123114A 1988-05-20 1988-05-20 Thick film hybrid integrated circuit Pending JPH01292894A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63123114A JPH01292894A (en) 1988-05-20 1988-05-20 Thick film hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63123114A JPH01292894A (en) 1988-05-20 1988-05-20 Thick film hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPH01292894A true JPH01292894A (en) 1989-11-27

Family

ID=14852526

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63123114A Pending JPH01292894A (en) 1988-05-20 1988-05-20 Thick film hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH01292894A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06166212A (en) * 1992-11-30 1994-06-14 Kyocera Corp Image device
JPH06166211A (en) * 1992-11-30 1994-06-14 Kyocera Corp Image device
JPH06191090A (en) * 1992-12-25 1994-07-12 Kyocera Corp Image apparatus
JPH06198957A (en) * 1992-12-29 1994-07-19 Kyocera Corp Imaging device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06166212A (en) * 1992-11-30 1994-06-14 Kyocera Corp Image device
JPH06166211A (en) * 1992-11-30 1994-06-14 Kyocera Corp Image device
JPH06191090A (en) * 1992-12-25 1994-07-12 Kyocera Corp Image apparatus
JPH06198957A (en) * 1992-12-29 1994-07-19 Kyocera Corp Imaging device

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