JPH01289191A - Three-dimensional printed wiring board structure - Google Patents

Three-dimensional printed wiring board structure

Info

Publication number
JPH01289191A
JPH01289191A JP11899088A JP11899088A JPH01289191A JP H01289191 A JPH01289191 A JP H01289191A JP 11899088 A JP11899088 A JP 11899088A JP 11899088 A JP11899088 A JP 11899088A JP H01289191 A JPH01289191 A JP H01289191A
Authority
JP
Japan
Prior art keywords
substrate
land
printed wiring
board
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11899088A
Other languages
Japanese (ja)
Inventor
Satoshi Ishii
敏 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP11899088A priority Critical patent/JPH01289191A/en
Publication of JPH01289191A publication Critical patent/JPH01289191A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/366Assembling printed circuits with other printed circuits substantially perpendicularly to each other

Landscapes

  • Combinations Of Printed Boards (AREA)

Abstract

PURPOSE:To efficiently utilize the area and space on a first board by a method wherein slots are provided in a first board, insertions to be inserted into the slots are provided on a second board, and the insertions are provided with long lands. CONSTITUTION:On the front and rear surfaces of a first board 1, conductive patterns are provided, consisting of land sections 2a and line sections 2b. In the first board 1, slots 5 are provided, penetrating from the front surface to the rear surface. On a second board 6, again, there are land sections 7a and line sections 7b, provided on the front and rear surfaces. Insertions 6a to be inserted into the slots 5 are formed on the second board 6. Catches 6b are provided on the board 6, to be arrested by the edges of the slots 5 upon insertion of the insertions 6a into the slots 5. It is so designed that the land sections 7a on the insertions 6a are longer than the slots 5 are deep. The insertions 6a are inserted into the slots 5, and then solder is applied for the connection of the land sections 2a near the circumferences of the slots 5 and the land sections 7a on the insertions 6a.

Description

【発明の詳細な説明】 技術分野 本発明は、−のプリント配線基板上の導電パターンと他
のプリント配線基板上の導電パターンとを接続した三次
元プリント配線基板構造に関する。
TECHNICAL FIELD The present invention relates to a three-dimensional printed wiring board structure in which a conductive pattern on one printed wiring board is connected to a conductive pattern on another printed wiring board.

背景技術 装置の小形化のためには、単に部品の小形化のみならず
、部品端子間の接続をする配線方式に対する配慮が必要
である。プリント配線基板は小形化の可能性とともに、
自動配線組み立てなどの技術を用いて、確実性の高い配
線を誤りなく行なうのに適しており、現在では各種の電
子、通信機器に採用されている。
BACKGROUND OF THE INVENTION In order to miniaturize devices, it is necessary not only to simply miniaturize components, but also to consider the wiring method for connecting component terminals. Along with the possibility of miniaturization of printed wiring boards,
It is suitable for performing highly reliable wiring without errors using techniques such as automatic wiring assembly, and is currently used in various electronic and communication equipment.

また、製品の多様化に伴い、小基板を機能ブロック単位
として、これを追加・削除することによる製品バリエー
ション展開が考えられる。
Additionally, as products become more diverse, it is possible to develop product variations by adding or deleting small circuit boards as functional blocks.

発明の概要 本発明は、プリント配線基板上の面積の利用効率の向上
及びプリント配線基板上の空間の利用効率の向上を達成
し得る三次元プリント配線基板構造を提供することを目
的としている。
SUMMARY OF THE INVENTION An object of the present invention is to provide a three-dimensional printed wiring board structure that can improve the efficiency of using the area on the printed wiring board and the efficiency of using the space on the printed wiring board.

上述の目的を達成する為、本発明による三次元プリント
配線基板構造においては、第1基板にその表面から裏面
に貫通する長孔を形成しこの長孔周縁近傍の表裏面上に
複数のランド部を形成すると共に、第2基板には第1基
板に形成された長孔に挿通される少なくとも1の挿通部
を設け、挿通部の表裏面の少なくとも一方に長孔の深さ
より長い複数のランド部を形成し、長孔に挿通部を挿通
して挿通部に形成された少なくとも1のランド部を長孔
周縁近傍の表裏面双方のランド部にハンダ付けしたこと
を特徴としている。
In order to achieve the above object, in the three-dimensional printed wiring board structure according to the present invention, a long hole penetrating from the front surface to the back surface is formed in the first substrate, and a plurality of land portions are formed on the front and back surfaces near the periphery of the long hole. At the same time, the second substrate is provided with at least one insertion portion that is inserted into the elongated hole formed in the first substrate, and a plurality of land portions that are longer than the depth of the elongated hole are provided on at least one of the front and back surfaces of the insertion portion. The insertion portion is inserted into the elongated hole, and at least one land portion formed in the insertion portion is soldered to the land portions on both the front and back surfaces near the periphery of the elongated hole.

実施例 以下本発明の実施例について添付図面を参照しつつ説明
する。
EXAMPLES Hereinafter, examples of the present invention will be described with reference to the accompanying drawings.

図示した様に本発明による三次元プリント配線基板構造
においては、第1基板1の表裏面双方にランド部2a及
びライン部2bからなる導電パターン2が形成されてい
る。第1基板1には抵抗等の電子部品3が実装されてお
り、電子部品3は対応するランド部2aにハンダ付けさ
れている。また、第1基板1にはその表面から裏面に貫
通する長孔5が穿設されている。長孔5の周縁近傍の表
裏面上には複数のランド部2aが形成されている。
As shown in the figure, in the three-dimensional printed wiring board structure according to the present invention, a conductive pattern 2 consisting of land portions 2a and line portions 2b is formed on both the front and back surfaces of the first substrate 1. Electronic components 3 such as resistors are mounted on the first substrate 1, and the electronic components 3 are soldered to corresponding lands 2a. Further, the first substrate 1 is provided with a long hole 5 penetrating from the front surface to the back surface thereof. A plurality of land portions 2a are formed on the front and back surfaces near the periphery of the elongated hole 5.

一方、第2基板6の表裏面双方にも第1基板と同様にラ
ンド部7a及びライン部7bからなる導電パターン7が
形成されている。また、第2基板6にも電子部品8が実
装されており、電子部品8は対応するランド部7aにハ
ンダ付けされている。
On the other hand, conductive patterns 7 made up of land portions 7a and line portions 7b are formed on both the front and back surfaces of the second substrate 6, similarly to the first substrate. Further, an electronic component 8 is also mounted on the second board 6, and the electronic component 8 is soldered to the corresponding land portion 7a.

第2基板6には第1基板1の長孔5に挿通される挿通部
6aが形成されると共に、挿通部6aが長孔5に挿通さ
れたとき長孔5の周縁に係止される係止部6bが挿通部
6aの側部に形成されている。
The second board 6 is formed with an insertion part 6a that is inserted into the elongated hole 5 of the first board 1, and a lock that is engaged with the periphery of the elongated hole 5 when the insertion part 6a is inserted into the elongated hole 5. A stop portion 6b is formed on the side of the insertion portion 6a.

挿通部6aにはその表裏面双方に複数のランド部7aが
形成されている。挿通部6aに形成されたランド部7a
は長孔5の深さすなわち第1基板1の厚さよりも長く形
成されており、長孔5の深さ方向に延在している。
A plurality of land portions 7a are formed on both the front and back surfaces of the insertion portion 6a. Land portion 7a formed in insertion portion 6a
is formed longer than the depth of the elongated hole 5, that is, the thickness of the first substrate 1, and extends in the depth direction of the elongated hole 5.

上述の如く構成された第2基板6の挿通部6aは第1基
板1の長孔5に挿通され、係止部6bが長孔5の周縁に
係止されて位置決めされる。この位置決めの後、長孔5
の周縁近傍に形成されたランド部2aとこれに対応して
挿通部6aに形成されたランド部7aとがハンダ付けさ
れることにより、両基板1及び6の導電パターン2及び
7が接続されると共に両基板1及び6相互の固定がなさ
れている。
The insertion portion 6a of the second substrate 6 configured as described above is inserted into the long hole 5 of the first substrate 1, and the locking portion 6b is locked to the periphery of the long hole 5 and positioned. After this positioning, the elongated hole 5
The conductive patterns 2 and 7 of both substrates 1 and 6 are connected by soldering the land portion 2a formed near the periphery of the board and the corresponding land portion 7a formed in the insertion portion 6a. At the same time, both substrates 1 and 6 are fixed to each other.

上述の実施例においては、第2基板の表裏面双方に導電
パターン7が形成されている場合について説明したが、
第2基板6に形成される導電パターン7は表裏面のいず
れか一方に形成されていれば良い。
In the above embodiment, the case where the conductive pattern 7 is formed on both the front and back surfaces of the second substrate is explained.
The conductive pattern 7 formed on the second substrate 6 may be formed on either the front or back surface.

なお、上述の如く構成された本発明による三次元プリン
ト配線基板においては、第3図に示した様に、第1基板
1の裏面に形成されたランド部2a−1を始点として、
第1基板1の裏面に形成されたライン部2b−1、第1
基板1の裏面のランド部2a−2、第2基板6の裏面に
形成されたランド部7a−1.第2基板6の裏面に形成
されたライン部7b−1、第2基板6の裏面に形成され
たランド部7 a −2、ランド部7a−2にハンダ付
けされた電子部品8aのリード線8a−L電子部品8 
a S電子部品8aのリード線8a−2、リード線8a
−2とハンダ付けされた第2基板6の表面のランド部7
a−3、第2基板6の表面に形成されたライン部7b−
2、第2基板6の表面のランド部7a−4、第1基板1
の裏面のランド部2a−3、第1基板1の裏面のライン
部2b−2、第1基板1の裏面のランド部2a−4、ラ
ンド部2a−4にハンダ付けされた電子部品8bのリー
ド線8b−1、電子部品8b、電子部品8bのリード線
8b−2、リード線8b−2とハンダ付けされた第1基
板1の表面のランド部2a−5、第1基板1の表面のラ
イン部2b−3、第1基板1の表面のランド部2a−6
、第2基板6の表面のランド部7a−5、第2基板6の
表面のライン部7b−3、第2基板6の表面のランド部
7a−6、第1基板1の裏面のランド部2a−7、第1
基板1の裏面のライン部2b−4を順に経て、第1基板
1の裏面のランド部2a−8を終点とする電導路を形成
するなど、第1基板1及び第2基板6の表裏面双方を利
用した縦横無尽の配線パターンを形成することが可能と
なる。
In addition, in the three-dimensional printed wiring board according to the present invention configured as described above, as shown in FIG.
The line portion 2b-1 formed on the back surface of the first substrate 1, the first
A land portion 2a-2 on the back surface of the substrate 1, a land portion 7a-1 formed on the back surface of the second substrate 6. A line portion 7b-1 formed on the back surface of the second board 6, a land portion 7a-2 formed on the back surface of the second board 6, and a lead wire 8a of an electronic component 8a soldered to the land portion 7a-2. -L electronic parts 8
a Lead wire 8a-2 of S electronic component 8a, lead wire 8a
Land portion 7 on the surface of the second board 6 soldered to -2
a-3, line portion 7b- formed on the surface of the second substrate 6
2. Land portion 7a-4 on the surface of the second substrate 6, first substrate 1
, the land portion 2a-3 on the back surface of the first board 1, the line portion 2b-2 on the back surface of the first board 1, the land portion 2a-4 on the back surface of the first board 1, and the lead of the electronic component 8b soldered to the land portion 2a-4. Wire 8b-1, electronic component 8b, lead wire 8b-2 of electronic component 8b, land portion 2a-5 on the surface of first substrate 1 soldered to lead wire 8b-2, line on the surface of first substrate 1 portion 2b-3, land portion 2a-6 on the surface of the first substrate 1
, a land portion 7a-5 on the front surface of the second substrate 6, a line portion 7b-3 on the front surface of the second substrate 6, a land portion 7a-6 on the front surface of the second substrate 6, a land portion 2a on the back surface of the first substrate 1. -7, 1st
Both the front and back surfaces of the first substrate 1 and the second substrate 6 are formed by forming a conductive path that sequentially passes through the line portion 2b-4 on the back surface of the substrate 1 and terminates at the land portion 2a-8 on the back surface of the first substrate 1. It becomes possible to form wiring patterns in all directions.

発明の詳細 な説明した様に、本発明による三次元プリント配線基板
においては、第1基板にその表面から裏面に貫通する長
孔を形成しこの長孔周縁近傍の表裏面上に複数のランド
部を形成すると共に、第2基板には第1基板に形成され
た長孔に挿通される少なくとも1の挿通部を設け挿通部
の表裏面の少な(とも一方に長孔の深さより長い複数の
ランド部を形成し、長孔に挿通部を挿通して挿通部に形
成された少なくとも1のランド部を長孔周縁近傍の表裏
面双方のランド部にハンダ付けした構成となっているの
で、第1基板上の面積及び空間を効率良く利用すること
が可能となる。また、第1基板の表裏面双方にてハンダ
付けされているので、表裏面双方の導電パターンを短絡
することが可能となり、導電パターン配置の自由度が増
すと共に、第2基板に加わる荷重が第1基板の表裏面双
方において引張荷重と圧縮荷重とに分散されるので、導
電パターンの剥離等の生じ難い強固な接続構造が得られ
る。
As described in detail, in the three-dimensional printed wiring board according to the present invention, a long hole penetrating from the front surface to the back surface is formed in the first substrate, and a plurality of land portions are formed on the front and back surfaces near the periphery of the long hole. At the same time, the second substrate is provided with at least one insertion portion that is inserted into the elongated hole formed in the first substrate. The insertion part is inserted into the elongated hole, and at least one land formed in the insertion part is soldered to the land parts on both the front and back surfaces near the periphery of the elongated hole. It is possible to efficiently utilize the area and space on the board.Also, since it is soldered on both the front and back sides of the first board, it is possible to short-circuit the conductive patterns on both the front and back sides, which increases the conductivity. In addition to increasing the degree of freedom in pattern placement, the load applied to the second board is distributed into tensile load and compressive load on both the front and back surfaces of the first board, resulting in a strong connection structure that is unlikely to cause peeling of the conductive pattern. It will be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による三次元プリント配線基板構造を示
した斜視図、第2図は本発明による三次元プリント配線
基板構造の部分断面図、第3図は三次元プリント基板の
配線例を示した図である。 主要部分の符号の説明 1・・・・・・第1基板    2・・・・・・導電パ
ターン2a・・・・・・ランドI    2b−−−−
・−ライン部3・・・・・・電子部品    5・・・
・・・長孔6・・・・・・第2基板    6a・・・
・・・挿通部6b・・・・・・係止部    7・・・
・・・導電パターン7a・・・・・・ランド部   7
b・・・・・・ライン部8・・・・・・電子部品 出願人   パイオニア株式会社
Fig. 1 is a perspective view showing a three-dimensional printed wiring board structure according to the present invention, Fig. 2 is a partial cross-sectional view of the three-dimensional printed wiring board structure according to the invention, and Fig. 3 shows an example of wiring of the three-dimensional printed wiring board. This is a diagram. Explanation of symbols of main parts 1...First substrate 2...Conductive pattern 2a...Land I 2b----
・-Line section 3...Electronic parts 5...
...Long hole 6...Second substrate 6a...
...Insertion part 6b...Locking part 7...
... Conductive pattern 7a ... Land portion 7
b...Line section 8...Electronic component applicant Pioneer Corporation

Claims (3)

【特許請求の範囲】[Claims] (1)第1基板の表裏面双方に形成されたランド部及び
ライン部からなる導電パターンに第2基板上に形成され
た導電パターンを接続した三次元プリント配線基板構造
であって、前記第1基板にその表面から裏面に貫通する
長孔を形成し前記長孔周縁近傍の表裏面上に複数のラン
ド部を形成すると共に、前記第2基板には前記長孔に挿
通される少なくとも1の挿通部を設け前記挿通部の表裏
面の少なくとも一方に前記長孔の深さより長い複数のラ
ンド部を形成し、前記長孔に前記挿通部を挿通して前記
挿通部に形成された少なくとも1のランド部を前記長孔
周縁近傍の表裏面双方のランド部にハンダ付けしたこと
を特徴とする三次元プリント配線基板構造。
(1) A three-dimensional printed wiring board structure in which a conductive pattern formed on a second substrate is connected to a conductive pattern consisting of land portions and line portions formed on both the front and back surfaces of the first substrate, A long hole penetrating from the front surface to the back surface is formed in the substrate, and a plurality of lands are formed on the front and back surfaces near the periphery of the long hole, and at least one land portion is formed in the second substrate to be inserted through the long hole. a plurality of lands longer than the depth of the elongated hole are formed on at least one of the front and back surfaces of the insertion portion, and at least one land is formed in the insertion portion by inserting the insertion portion into the elongated hole. A three-dimensional printed wiring board structure, characterized in that the parts are soldered to land parts on both the front and back surfaces near the periphery of the elongated hole.
(2)前記挿通部の側部には前記長孔周縁に係止される
係止部が形成されていることを特徴とする請求項1記載
の三次元プリント配線基板構造。
(2) The three-dimensional printed wiring board structure according to claim 1, wherein a locking portion is formed on a side of the insertion portion to be locked to a peripheral edge of the elongated hole.
(3)前記第2基板は表裏面双方に導電パターンを有し
、前記第2基板の表裏面各々において少なくとも1のラ
ンド部が前記第2基板上の表裏面双方に形成されたラン
ド部とハンダ付けされていることを特徴とすることを特
徴とする請求項1または2記載の三次元プリント配線基
板構造。
(3) The second substrate has a conductive pattern on both the front and back surfaces, and at least one land portion on each of the front and back surfaces of the second substrate is connected to a land portion formed on both the front and back surfaces of the second substrate. The three-dimensional printed wiring board structure according to claim 1 or 2, characterized in that the three-dimensional printed wiring board structure is attached.
JP11899088A 1988-05-16 1988-05-16 Three-dimensional printed wiring board structure Pending JPH01289191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11899088A JPH01289191A (en) 1988-05-16 1988-05-16 Three-dimensional printed wiring board structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11899088A JPH01289191A (en) 1988-05-16 1988-05-16 Three-dimensional printed wiring board structure

Publications (1)

Publication Number Publication Date
JPH01289191A true JPH01289191A (en) 1989-11-21

Family

ID=14750276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11899088A Pending JPH01289191A (en) 1988-05-16 1988-05-16 Three-dimensional printed wiring board structure

Country Status (1)

Country Link
JP (1) JPH01289191A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343366A (en) * 1992-06-24 1994-08-30 International Business Machines Corporation Packages for stacked integrated circuit chip cubes
US6128201A (en) * 1997-05-23 2000-10-03 Alpine Microsystems, Inc. Three dimensional mounting assembly for integrated circuits

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS578772B2 (en) * 1975-03-28 1982-02-18

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS578772B2 (en) * 1975-03-28 1982-02-18

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343366A (en) * 1992-06-24 1994-08-30 International Business Machines Corporation Packages for stacked integrated circuit chip cubes
US6128201A (en) * 1997-05-23 2000-10-03 Alpine Microsystems, Inc. Three dimensional mounting assembly for integrated circuits

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