JPH0127572B2 - - Google Patents
Info
- Publication number
- JPH0127572B2 JPH0127572B2 JP53104353A JP10435378A JPH0127572B2 JP H0127572 B2 JPH0127572 B2 JP H0127572B2 JP 53104353 A JP53104353 A JP 53104353A JP 10435378 A JP10435378 A JP 10435378A JP H0127572 B2 JPH0127572 B2 JP H0127572B2
- Authority
- JP
- Japan
- Prior art keywords
- etching
- conductive layer
- substrate
- electrical wiring
- pole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Weting (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10435378A JPS5531639A (en) | 1978-08-29 | 1978-08-29 | Forming method for electric wiring |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10435378A JPS5531639A (en) | 1978-08-29 | 1978-08-29 | Forming method for electric wiring |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5531639A JPS5531639A (en) | 1980-03-06 |
| JPH0127572B2 true JPH0127572B2 (enrdf_load_stackoverflow) | 1989-05-30 |
Family
ID=14378507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10435378A Granted JPS5531639A (en) | 1978-08-29 | 1978-08-29 | Forming method for electric wiring |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5531639A (enrdf_load_stackoverflow) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58141531A (ja) * | 1982-02-18 | 1983-08-22 | Toshiba Corp | 半導体素子用金属薄膜エツチング装置 |
| EP0171195B1 (en) * | 1984-07-09 | 1991-01-02 | Sigma Corporation | Method for detecting endpoint of development |
| JP2509572B2 (ja) * | 1985-08-19 | 1996-06-19 | 株式会社東芝 | パタ−ン形成方法及び装置 |
| US6378199B1 (en) | 1994-05-13 | 2002-04-30 | Dai Nippon Printing Co., Ltd. | Multi-layer printed-wiring board process for producing |
| JP5544997B2 (ja) * | 2010-04-12 | 2014-07-09 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置の製造装置。 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5387667A (en) * | 1977-01-12 | 1978-08-02 | Hitachi Ltd | Detecting method for etching end point of non-conductive film |
-
1978
- 1978-08-29 JP JP10435378A patent/JPS5531639A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5531639A (en) | 1980-03-06 |
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