JPH01264813A - Manufacture of laminate - Google Patents
Manufacture of laminateInfo
- Publication number
- JPH01264813A JPH01264813A JP9401888A JP9401888A JPH01264813A JP H01264813 A JPH01264813 A JP H01264813A JP 9401888 A JP9401888 A JP 9401888A JP 9401888 A JP9401888 A JP 9401888A JP H01264813 A JPH01264813 A JP H01264813A
- Authority
- JP
- Japan
- Prior art keywords
- laminate
- prepreg
- metal plate
- hole
- metallic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000000034 method Methods 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims description 52
- 229910052751 metal Inorganic materials 0.000 claims description 52
- 239000011347 resin Substances 0.000 abstract description 14
- 229920005989 resin Polymers 0.000 abstract description 14
- 238000010438 heat treatment Methods 0.000 abstract description 7
- 239000011888 foil Substances 0.000 abstract description 6
- 238000000465 moulding Methods 0.000 abstract description 4
- 238000010276 construction Methods 0.000 abstract 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000000945 filler Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 239000009719 polyimide resin Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 3
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical class O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 101100008047 Caenorhabditis elegans cut-3 gene Proteins 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000002841 Lewis acid Substances 0.000 description 1
- -1 Lewis acid compound Chemical class 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 239000011295 pitch Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Abstract
Description
本発明は、電気回路板として用いられる金属板を基板と
する多層の積層板の製造方法に関するものである。The present invention relates to a method for manufacturing a multilayer laminate whose substrate is a metal plate used as an electric circuit board.
金属板を基板とする電気回路用の多層の積層板を製造す
るにあたっては、複数枚の金属板をプリプレグを介して
重ね、これを加熱加圧成形することによっておこなうこ
とができ、このとき各金属板の開には片面プリント配線
板や両面プリント配線板、多層プリント配線板などの回
路を形成した回路板をプリプレグを介して重ねるように
してあり、各回路板を金属板間に積層接着して多層の回
路を形成するようにしである。To manufacture multilayer laminates for electrical circuits using metal plates as substrates, it is possible to stack multiple metal plates with prepreg interposed between them and heat and press-form them. When opening the board, circuit boards with circuits formed on them, such as single-sided printed wiring boards, double-sided printed wiring boards, and multilayer printed wiring boards, are layered via prepreg, and each circuit board is laminated and bonded between metal plates. This is to form a multilayer circuit.
しかし、上記のように複数枚の金属板を加熱加圧成形し
て積層する場合!、金属板に成形の際の加熱や加圧によ
って歪みが生じ、この歪みが金属板の端部においてゆが
みなどの変形となって表れ、この金属板の変形で積層板
に反りやねじれが発生するおそれがある。
本発明は上記の点に鑑みて為されたものであり、反りや
ねじれの発生を低減することができる積層板の製造方法
を提供することを目的とするものである。However, when multiple metal plates are heated and pressed and laminated as shown above! , distortion occurs in the metal plate due to heating and pressure during forming, and this distortion appears as distortion and other deformations at the edges of the metal plate, and this deformation of the metal plate causes warping and twisting in the laminate. There is a risk. The present invention has been made in view of the above points, and an object of the present invention is to provide a method for manufacturing a laminate that can reduce the occurrence of warpage and twisting.
上記課題を解決するために本発明は、複数枚の金属板1
をプリプレグ2を介して重ね、これを加熱加圧成形する
ことによって積層板を製造するにあたって、金属板1と
して端部に切り込み3を設けたものを用いるようにした
ことを特徴とするものである。In order to solve the above problems, the present invention provides a plurality of metal plates 1
The metal plate 1 is characterized in that a metal plate 1 with a notch 3 provided at the end is used to manufacture a laminate by stacking the metal plates with a prepreg 2 interposed therebetween and molding them under heat and pressure. .
成形の際に金属板1に生じる歪みを金属板1の端部に形
成した切り込み3で吸収して、金属板1の端部が変形す
ることを防止することができ、積層板に反りやねじれが
発生することを防止することができる。
以下本発明の詳細な説明する。
プリプレグ2はガラス布等の基材にエポキシ樹脂やポリ
イミド樹脂などの熱硬化性樹脂フェスを含浸して乾燥す
ることによって調製されるものであり、この樹脂には無
機質の充填剤を配合して用いるのが好ましい、また銅板
などで形成される金属板1にはスルーホール5を形成す
る笛所においてパンチ加工やドリル加工などで通孔6を
形成が形成しである1通孔6はスルーホール5の直径よ
りも大きな直径で形成されるものである。そして金属板
1のjlgには第2図に示すように切り込み3が設けで
ある。この切り込み3は金属板1の各辺において1〜2
本程度設けられるものであり、その幅寸法は2〜31程
度、その長さは10〜30mm程度が好ましい。
しかして金属板2を基板とする電気回路板用の積層板を
製造するにあたっては、まず第1図(a)のようにプリ
プレグ2を介して金属板1を数枚重ね、さらに上下にプ
リプレグ2を介して銅箔なと金属M9を重ねる。このと
きさらに各金属板1の開には片面プリント配線板や両面
プリント配線板、多層プリント配線板などの回路を形成
した回路板10がプリプレグ2を介して重ねである。も
ちろん総ての金属板1間に回路板10を配置するような
必要はな(、一部の金属板1同士はプリプレグ2を介し
て直接重ねられるようにしでもよい、そしてこれを加熱
加圧成形することによって、プリプレグ2に含浸したf
it脂を硬化させて各金属板1と回路板10とを交互に
積層接着させると共に最外層に金属W9を積層接着させ
、さらにプリプレグ2に含浸した樹脂の一部を金属板1
の各通孔6内に流入させて#1図(b)のように樹脂4
で通孔6内を充填させる。このようにして金属板1の通
孔6に樹脂4を充填させた状態で各金属板1を積層する
と共に上下にそれぞれ金属箔9を積層した積層板Aを作
成することができるものである。ここで、成形の際の加
熱や加圧によって金属板1に歪みが生じても金属板1の
端部にゆがみ変形が発生することを切り込み3によって
吸収して緩和することができ、この変形に起因して積層
板Aに反りやねじれなどが発生することを低減すること
ができる。尚、積層板Aの端部は最終工程において切断
除去されるために、金属板1に設けるq9込み3は製品
に何等影響することはない。
こののちに積層板Aにドリル加工やパンチ加工などで第
1図(C)のようにスルーホール5を穿孔加工する。ス
ルーホール5は通孔6に充填した樹脂4の部分において
通孔6の直径よりも小さい直径で形成されるものであり
、従ってスルーホール5の内周と金属板1との間の電気
絶縁性は樹脂4によって確保されることになる。尚、上
記実施例では一部の金属板1にスルーホール5を貫通さ
せて7−スなどをとることができるようにしである。
そして上記のようにスルーホール5を加工したのちに、
スルーホール5の内周に銅などのスルーホールメツキを
施してスルーホールメツキ層を形成し、また金属箔9を
エツチング処理して回路を形成した9などすることによ
って、金属板1を基板とし回路板10に形成された内層
回路と金属箔9の加工で形成される外層回路がそれぞれ
設けられた多層回路の電気積層板に仕上げるのである。
尚、このように形成される電気積層板にあって、プリプ
レグ2に含浸した樹脂中に充填剤を配合しでお(ことに
よって、金属板1の通孔6に充填される樹脂4中にも充
填剤が含有されるようにし、樹脂4の部分においてスル
ーホール5を穿孔加工するとスルーホール5の内周に充
填剤が露出しで門凸面が形成されるようにしてアンカー
効果でスルーホールメツキ層の密着性を高めることがで
きるものである。
r審愉帰1
次に本発明を実施例によって具体的に説明する。
K(4
末端官能型イミド樹脂(住友化学社!TMS−20)2
00重量部、液状エポキシ樹W!149重量部、ブロム
化ノポラフク樹9136重量部、ルイス酸化合物82重
量部、不飽和ビスマレイミド20重量部を混合し、90
℃で50分間加熱したのちに常温にまで冷却して30分
間攪拌下反応させることによってエポキシ変性ポリイミ
ド樹脂フェスを調製した。そしてこのエポキシ変性ポリ
イミド御脂フェスに充填剤としてEがラス微粉末を50
PHRの配合量で配合して混合した。
次にこのエポキシ変性ポリイミド樹脂フェスに基材とし
てガラス不繊布(日本バイリーン製EP−4075ニア
5g/m2)を浸漬し、次いで乾燥することによって
、780 g/ m”のプリプレグを作成した。ここで
乾燥の条件はプリプレグ中の樹脂の130℃での溶融粘
度が300〜700ボイズに、170℃、20 kg/
mm2.10分間の条件でのグリニス(m脂流れ性)
が20〜25%になるように設定した。
一方、金属板として500+e+X4005mX0゜5
謹謡の銅板を用い、直径が1 、5 mmの通孔を1.
8II11ピツチで縦100×横60の個数設けた。さ
らにこの金属板には幅31111%長さ15−簡の切り
込みを第2図に示す寸匝間隔で設けた(第2図において
数値の単位はI)、そしてこの金属板を3枚、両面銅張
ポリイミド樹脂積層板の銅箔をエツチング加工して回路
を設けることによって形成した両面プリント配線板を2
枚用い、これらを第1図(a)のように上記プリプレグ
を介して交互に重ねると共に上下にプリプレグを介して
11!箔を重ね、20kg/em”の加圧条件を維持し
つつ140℃で20分間、170℃で90分間加熱する
と共に20分間を要して冷却して積層成形をおこなうこ
とによって、金属板と両面プリント配線板とを交互に積
層し表面に銅箔を張った多層積層板を得た。
こののちに金属板の通孔の部分において多層積層板に直
径が0.9IIIlのスルーホールをドリル加工し、次
いで銅メツキおこなってスルーホールの内周にスルーホ
ールメツキを施した。
雌驚九
金属板として切り込みを設けていないものを用いるよう
にした他は、実施例と同様にして多層積層板を作成した
。
実施例及び比較例で得た多層積層板の反りやねじれを測
定したところ、実施例のものは0 、5 +n+で合格
であったが、比較例のものは10−一で不合格であった
。The distortion that occurs in the metal plate 1 during forming can be absorbed by the notches 3 formed at the end of the metal plate 1, preventing the end of the metal plate 1 from deforming, and preventing warping or twisting of the laminate. can be prevented from occurring. The present invention will be explained in detail below. Prepreg 2 is prepared by impregnating a base material such as glass cloth with a thermosetting resin face such as epoxy resin or polyimide resin and drying it, and this resin is mixed with an inorganic filler. It is preferable that the through hole 6 is formed by punching or drilling in the metal plate 1 made of a copper plate or the like in which the through hole 5 is formed. It is formed with a diameter larger than the diameter of the A notch 3 is provided in the jlg of the metal plate 1 as shown in FIG. This cut 3 is 1 to 2 on each side of the metal plate 1.
The width dimension is preferably about 2 to 31 mm, and the length is preferably about 10 to 30 mm. Therefore, in manufacturing a laminate for an electric circuit board using metal plate 2 as a substrate, first stack several metal plates 1 with prepreg 2 interposed therebetween as shown in FIG. Overlap the copper foil and metal M9 through the. At this time, a circuit board 10 on which a circuit is formed, such as a single-sided printed wiring board, a double-sided printed wiring board, or a multilayer printed wiring board, is stacked on the opening of each metal plate 1 via a prepreg 2. Of course, it is not necessary to arrange the circuit board 10 between all the metal plates 1 (some of the metal plates 1 may be placed directly on top of each other via the prepreg 2, and this may be formed by heating and pressure forming). By doing so, f impregnated into prepreg 2
By curing the IT resin, each metal plate 1 and the circuit board 10 are laminated and bonded alternately, and metal W9 is laminated and bonded to the outermost layer, and a part of the resin impregnated in the prepreg 2 is added to the metal plate 1.
#1 As shown in Figure (b), resin 4 flows into each through hole 6 of #1.
to fill the inside of the through hole 6. In this way, a laminate A can be created in which the metal plates 1 are laminated with the through holes 6 of the metal plates 1 filled with the resin 4, and metal foils 9 are laminated on the upper and lower sides, respectively. Here, even if the metal plate 1 is distorted due to heating and pressure during forming, the distortion and deformation that occurs at the end of the metal plate 1 can be absorbed and alleviated by the cuts 3, and this deformation can be alleviated. It is possible to reduce the occurrence of warpage, twisting, etc. in the laminate A due to this. Incidentally, since the ends of the laminate A are cut and removed in the final process, the q9-included 3 provided on the metal plate 1 has no effect on the product. Thereafter, through holes 5 are formed in the laminate A by drilling, punching, etc. as shown in FIG. 1(C). The through hole 5 is formed with a smaller diameter than the diameter of the through hole 6 in the portion of the resin 4 filled in the through hole 6, and therefore the electrical insulation between the inner periphery of the through hole 5 and the metal plate 1 is poor. is ensured by the resin 4. In the above embodiment, a through hole 5 is made to pass through a part of the metal plate 1 so that a 7-pass or the like can be taken. After processing the through hole 5 as described above,
A through-hole plating layer is formed by plating the inner periphery of the through-hole 5 with copper or the like, and a circuit is formed by etching the metal foil 9 to form a circuit using the metal plate 1 as a substrate. The finished product is an electrical laminate with a multilayer circuit provided with an inner layer circuit formed on the board 10 and an outer layer circuit formed by processing the metal foil 9. In addition, in the electrical laminate formed in this way, a filler is added to the resin impregnated into the prepreg 2 (thereby, a filler is added to the resin 4 filled into the through holes 6 of the metal plate 1). When a through hole 5 is drilled in the resin 4, the filler is exposed on the inner periphery of the through hole 5 and a convex gate surface is formed, so that the through hole plating layer has an anchor effect. The present invention will be specifically explained with reference to examples.
00 parts by weight, liquid epoxy tree W! 149 parts by weight, 9136 parts by weight of brominated nopora fuku tree, 82 parts by weight of Lewis acid compound, and 20 parts by weight of unsaturated bismaleimide were mixed, and 90 parts by weight of unsaturated bismaleimide were mixed.
An epoxy-modified polyimide resin face was prepared by heating at °C for 50 minutes, cooling to room temperature, and reacting with stirring for 30 minutes. Then, E added 50% of lath fine powder to this epoxy-modified polyimide gobushi face as a filler.
They were blended and mixed in the amount of PHR. Next, a glass nonwoven fabric (EP-4075 NEAR 5 g/m2 manufactured by Nippon Vilene) was immersed into this epoxy-modified polyimide resin face as a base material, and then dried to create a 780 g/m'' prepreg. The drying conditions are such that the melt viscosity of the resin in the prepreg at 130°C is 300 to 700 voids, 170°C, and 20 kg/
mm2. Grinis under conditions of 10 minutes (m fat flowability)
was set to be 20 to 25%. On the other hand, as a metal plate, 500+e+X4005mX0°5
Using a copper plate, make a through hole with a diameter of 1.5 mm.
The number of pieces was 100 in length x 60 in width with 8II and 11 pitches. Furthermore, cuts with a width of 31111% and a length of 15 mm were made on this metal plate at the spacing shown in Figure 2 (the unit of numerical value is I in Figure 2). Two-sided printed wiring board made by etching the copper foil of a stretched polyimide resin laminate to form a circuit.
As shown in FIG. 1(a), these sheets are stacked alternately with the above prepreg interposed therebetween, and 11! By overlapping the foils and heating them at 140°C for 20 minutes and 170°C for 90 minutes while maintaining a pressure condition of 20 kg/em, and cooling for 20 minutes to perform laminated molding, the metal plate and both sides are bonded. A multilayer laminate was obtained in which printed wiring boards were laminated alternately and copper foil was placed on the surface.After this, a through hole with a diameter of 0.9III was drilled in the multilayer laminate at the through hole part of the metal plate. Then, copper plating was performed to plate the inner periphery of the through hole.A multilayer laminate was made in the same manner as in the example except that a metal plate with no notches was used as the female plate. When we measured the warping and twisting of the multilayer laminates obtained in the Examples and Comparative Examples, the Examples passed the test with a score of 0,5+n+, but the Comparative Examples failed with a score of 10-1. there were.
上述のように本発明にあっては、金属板として端部に切
り込みを設けたものを用いるようにしたので、積層成形
の際の加熱や加圧によって金属板に歪みが生じても金属
板の端部にゆがみ変形が発生じることを切り込みによっ
て吸収して緩和することができ、この変形に起因する反
りやねじれなどが積層板に生じることを低減することが
できるものである。As mentioned above, in the present invention, a metal plate with a notch provided at the end is used, so even if the metal plate is distorted due to heating or pressure during lamination molding, the metal plate will not be distorted. It is possible to absorb and alleviate the occurrence of distortion deformation at the end portions by the cuts, and it is possible to reduce the occurrence of warpage, twisting, etc. in the laminate due to this deformation.
第1図(a)(b)(c)は積層板の製造の各工程を示
す断面図、第2図は本発明に用いる金属板の一例を示す
平面図である。
1は金属板、2はプリプレグ、3は切り込みである。FIGS. 1(a), (b), and (c) are cross-sectional views showing each step of manufacturing a laminate, and FIG. 2 is a plan view showing an example of a metal plate used in the present invention. 1 is a metal plate, 2 is a prepreg, and 3 is a notch.
Claims (1)
を加熱加圧成形することによって積層板を製造するにあ
たって、金属板として端部に切り込みを設けたものを用
いるようにしたことを特徴とする積層板の製造方法。(1) When producing a laminate by stacking multiple metal plates with prepreg interposed between them and forming them under heat and pressure, a metal plate with a notch at the end is used as the metal plate. A method for manufacturing a laminate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9401888A JPH01264813A (en) | 1988-04-15 | 1988-04-15 | Manufacture of laminate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9401888A JPH01264813A (en) | 1988-04-15 | 1988-04-15 | Manufacture of laminate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01264813A true JPH01264813A (en) | 1989-10-23 |
Family
ID=14098778
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9401888A Pending JPH01264813A (en) | 1988-04-15 | 1988-04-15 | Manufacture of laminate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01264813A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007250882A (en) * | 2006-03-16 | 2007-09-27 | Furukawa Electric Co Ltd:The | Printed wiring board and its manufacturing method |
JP2013115136A (en) * | 2011-11-25 | 2013-06-10 | Ibiden Co Ltd | Substrate with built-in electronic components and manufacturing method of the same |
-
1988
- 1988-04-15 JP JP9401888A patent/JPH01264813A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007250882A (en) * | 2006-03-16 | 2007-09-27 | Furukawa Electric Co Ltd:The | Printed wiring board and its manufacturing method |
JP2013115136A (en) * | 2011-11-25 | 2013-06-10 | Ibiden Co Ltd | Substrate with built-in electronic components and manufacturing method of the same |
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