JPH01263852A - Microprocessor system - Google Patents

Abstract

PURPOSE:To study the factors of the fault of a device which is under operation by acquiring the contents of a memory at an optional time point at occurrence of the fault without stopping the working of the device. CONSTITUTION:A data saving memory 3 is provided together with a data saving control circuit 2 which is connected to a system bus and contains a microprocessor. When a trigger signal set on a signal line 7 is inputted to the circuit 2 with detection of a fault, etc., the circuit 2 reads out the data received from a start address set opposite to the trigger signal through a system bus 2 and at the same time writes the data into the memory 3 up to a designated range. The saved data are read out of the memory 3 via the circuit 2.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to firmware devices using microprocessors, and more particularly to storage in memory.

(Prior Art) Conventionally, in firmware using a microprocessor, a device is configured as a TA by a read-only memory, a random access memory, and a bus controller in addition to a processor.

Among these, the random access memory used as the system memory is used as a work area or a buffer, but of course, if a large amount of data is written to the memory.

The data that had been stored up to that point was gone.

(Problem to be solved by the invention) The system memory in the conventional microprocessor system mentioned above usually consists of random access memory, and when new data is written to the memory, it is The data that was previously saved will be lost.

When a failure occurs in a device, there are times when it is necessary to obtain the memory contents at the time of the failure in order to investigate the cause of the failure, but with conventional devices, it is not necessary to check the memory contents at the time of the failure.
cannot be obtained. Therefore, there is a drawback that the cause of the failure cannot be investigated.

The purpose of the present invention is to record the contents of memory at any time, such as when a failure occurs, in the device at that time? It is an object of the present invention to provide a microprocessor system configured to eliminate all of the above-mentioned drawbacks and to investigate the cause of a failure by acquiring information without stopping.

(Means for Solving All the Problems) The microprocessor system according to the present invention has a memory for storing data.

Is the microprocessor connected to the system bus? It is constructed in parallel with the built-in data save control circuit.

When the data save control circuit receives an external trigger signal, what is the address of the system memory? Specify 1 data along with anti-copy, data? Data Samurai Sewing Memo This is something you won't need to keep for a month.

(Example) Next, five aspects of the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an example of a single microprocessor system.

In FIG. 1, %1 is a system memory, 2 is a data waiting control circuit, and 3 is a data waiting memory.

4 is an address bus, 5 is a data bus, 6 is a control signal line,
7 is Torigaiza Line.

The system memory 1 is a normally used memory connected to a bus within the firmware.

The data transfer control circuit 2 is activated by a trigger signal on the signal line 7, and is controlled by a microprocessor to transfer all data in a specific area in the system memory 1 to the data transfer memory 31.

A plurality of trigger lines 48 are connected to the control circuit 2. Which area of data is stored in system memory 1 when each trigger signal is input? Whether to save or not is set in advance in the control circuit 2 as a start address and the number of data by a program.

For fault detection etc. 7 When the trigger signal on the signal line 7 is input to the control circuit 2, the control circuit 2 reads data from the system bus t=A from the start address set corresponding to the input trigger signal. , the output data is stored in the samurai sewing memory 3, and is applied to the specified range.

The saved data is available from the save memory 3. l! ! 1
It is read out through the entire circuit 2.

(Effects of the Invention) As explained above, the present invention is capable of detecting the contents of the system at any time when two failures occur, and by acquiring the contents of the system at any time without stopping the equipment at that time, failure of the equipment in operation is possible. It is effective for keys such as F.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the microprocessor system according to the present invention. ■1... System memory 2... Data saver circuit 3... Data save memory 4.5.・Size 6.7...Signal line width 1x

Claims (1)

[Claims] It has a data save memory for saving data, and a microprocessor that is connected to the system bus and reads out the data by specifying the address of the system memory when receiving an external trigger signal. A microprocessor system comprising: a data save control circuit for writing the data into the data save memory.