JPH04102941A - Microprocessor system - Google Patents

Abstract

PURPOSE:To obtain memory contents at an optical point of time including fault generation time without aborting a device at that time by providing this microprocessor system with a memory card type data storing memory and a control circuit for controlling the start and stop of writing. CONSTITUTION:The microprocessor system is provided with the data storing memory 1 having structure attachable/detechable to/from a firmware device and constituted so as to store data written in the same address space as a system memory 4 in a connected state to a system bus 6 and the control circuit 2 for controlling the start and stop of data writing in the memory 1 based upon a trigger signal inputted from the external. When the trigger signal for stopping the writing operation is inputted due to the detection or the like of a fault, the control circuit 2 stops the supply of a writing signal to the memory 1 so as to hold the contents of the memory 1 obtained at the time of inputting the trigger signal. Consequently, data is obtained at an optional point of time without aborting the device.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprocessor system having memory content storage means in a firmware device using a microprocessor.

[Conventional technology]

Conventionally, a firmware device using a microprocessor includes a processor, a read-only memory, a random access memory, and a bypass controller 1-roller. Among these, a processor as a firmware device performs processing operations by combining a read-only memory and a microprogram stored in a part of a random access memory. Further, in accordance with this processing operation procedure, the processor sequentially reads data written in other data areas of the random access memory and performs data processing. When new update data is input to the data written in the data area of the random access memory, the previous data is naturally erased and replaced with new data. Therefore, even if a firmware device failure occurs during this data processing, the data in the aforementioned random access memory is still updated.

[Invention or problem to be solved]

The conventional microprocessor system described above uses random access memory as the system memory, so when new data is written to the memory, the previously written data is updated. Therefore, when a failure occurs in a firmware device, you may want to obtain the memory contents at the time of the failure without stopping the device in order to analyze the cause. The disadvantage is that it is not possible to investigate the cause of the failure.

[Means to solve the problem]

The microprocessor system of the present invention includes a firmware device having a system memory, a processor, and a system bus, and has a structure that can be attached to and detached from the firmware device, and the microprocessor system has a structure in which the firmware device can be attached to and detached from the firmware device, and the A data retention memory that retains data written in the same address space as the system memory, and a control circuit that controls the start and stop of writing data to the data retention memory using a tri-force signal input from the outside. The data holding memory can be attached and detached without affecting the operation of the firmware device.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. The embodiment shown in FIG. 1 shows the main parts in the firmware device, including a system memory 4 which is a random access memory similar to the conventional example, a processor 5, a system bus 6, a data holding memory 1 of the present invention, and a write control circuit 2. It is configured by adding . Although not shown, the read-only memory is embedded in the processor 5. The data holding memory 1 is, for example, a memory card with a battery backup function, and is connected to the same system bus 6 as the system memory 4, but only the write signal line is connected and the read signal line is not connected. Therefore, data is read only from the system memory 4. A control circuit 2 that controls the start and stop of data writing is activated by a trigger signal 3, and is activated by a system bus 6.
Controls the start and stop of writing the above data to the data holding memory 1. Further, a plurality of trigger signal lines 3 are connected to the control circuit 2, and it is set in advance in the control circuit 2 whether to start or stop writing when each trigger signal is input manually.

When writing is started by a write trigger signal, the control circuit 2 gives a write signal in the control line to the data holding memory 1, and the same data as the data written to the system memory 4 is written to the data holding memory 1. Control as follows. In addition, when a trigger signal to stop writing is input to the control circuit 2 due to the detection of a failure, etc., the control circuit 2 stops supplying the write signal to the data holding memory 1, and the memory contents are changed to the point at which the trigger signal is input. The contents of the file will be retained as is. In this state, data at a desired point in time can be obtained by removing the data holding memory 1, which is a memory card, from the device and reading the memory contents with another device.

〔Effect of the invention〕

As explained above, the present invention includes a memory card type data retention memory and a write start/stop control circuit, so that the memory contents at any time, including when a failure occurs, can be transferred to the device at that time. can be obtained without stopping. Therefore, it is highly effective in investigating failures of firmware devices in operation.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Memory for data retention, 2... Control circuit, 3...
...Trigger signal line, 4...System memory, 5...
Processor, 6. System bus.

Claims (1)

[Claims] In a microprocessor system equipped with a firmware device having a system memory, a processor, and a system bus, the structure is removable from the firmware device, and when the firmware device is connected to the system bus, writing is performed in the same address space as the system memory. The firmware device has a data retention memory that retains stored data, and a control circuit that controls the start and stop of writing data to the data retention memory based on a trigger signal input from an external device, and has an effect on the operation of the firmware device. A microprocessor system characterized in that the data holding memory can be attached and detached without giving any damage.