JPH01262665A - Semiconductor device for power - Google Patents

Abstract

PURPOSE:To shorten distances among an emitter region and base contacts, to increase the effective area of the emitter region and to avoid partial current concentration by subdividing a base region into a plurality of sections by the emitter region and forming zigzag array patterns and shaping the base contacts in the subdivision of base regions. CONSTITUTION:A semiconductor substrate is composed of a first conductivity type high-resistance collector region 1-a and a collector region 1-b having low resistance, and a second conductivity type base layer 2 is deposited onto the surface of the layer 1 a positioned at an upper section. First conductivity type emitter regions 3 are diffused and shaped to the surface layer of the layer 2 at intervals, the whole surface including the regions 3 is coated with an insulating film, openings are bored, and base electrodes 6 are formed to each exposed layer 2 and emitter electrodes 7 to the regions 3 respectively. Accordingly, the emitter layer 2 is divided zigzag by the regions 3 in the surface layer section while being connected in the bottom in the bottom, peripheral length to the areas of the regions 3 is lengthened, an effective area is increased, current concentration is reduced and switching characteristics are improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an improvement in a power semiconductor device, particularly a current-driven, self-extinguishing type power semiconductor device.

[Conventional technology]

Conventionally, as this type of current-driven, self-extinguishing type power semiconductor device 4, for example, a power bipolar transistor generally handles a large current and large power, so it has the ability to amplify current even in a large current region. It is desirable to have electrical characteristics that do not reduce efficiency, have high switching speed, and have a wide safe operating range.

In order to achieve these electrical characteristics,
It is necessary to configure the device so that it prevents the emitter injection efficiency from decreasing under large current conditions, averages the current density over the entire area of one current-carrying region, and applies a uniform base bias.

FIGS. 3(a), (b) to FIG. 5(a), (b) show the schematic structure of conventional individual power transistors of this type.

That is, in the device configurations of these conventional examples shown in the figures, reference numeral 1-a denotes a high-resistance collector layer of the first conductivity type that serves as a collector region, and numeral 1-b denotes a low-resistance collector layer of the first conductivity type that also serves as a collector region. 2 is a base region of a second conductivity type opposite to the first conductivity type formed in the collector layer la, and 3 is a base region formed in the base region 2. 4. shows an emitter region of a first conductivity type embedded; and 5 are respectively a base contact and an emitter contact, 6.7. and 8 are a base electrode, an emitter electrode, and a collector electrode, respectively.

Among the conventional devices shown in FIGS. 3 to 5, the device shown in FIG. 5 is one that was developed relatively early as a power transistor. Figure 3 was developed later.

When comparing the same emitter pattern area with the device configured in Figure 4, there is an emitter located far away from the base contact, and for this emitter,
Since the supply of base current is limited by the resistance in the base region, the effective area of the emitter becomes substantially smaller, which has the disadvantage of increasing the current amplification factor at large currents. On the other hand, the presence of the emitter far away from the base contact is not desirable in terms of improving switching characteristics and safe operating area, and at present, power transistors are The mainstream pattern configuration has generally shifted to the configuration of the apparatus shown in FIGS. 3 and 4.

As you can see, the feature of the power transistors shown in FIGS. 3 and 4 is that the power transistors are located within the base region and have a depth that does not penetrate through the base region. An emitter region is formed by subdividing the emitter region into a large number of parts consisting of an array, and inside each base region subdivided into a large number of parts by this lattice-like arrangement.

The point is that base contacts are formed on each side.

And the configurations shown in FIGS. 3 and 4.

In the device structure shown in FIG. 5, when compared with the device structure shown in FIG. , it is possible to suppress the decrease in the current amplification factor even at large currents, and in terms of improving switching characteristics and safe operating area, the structure reduces the emitter distance from the base contact. In this respect as well, sufficient effects can be expected.

[Problem to be solved by the invention]

However, in the device structure of the conventional power transistor shown in FIG. 3 and FIG. This is the part located farthest away, and is the part where it is difficult to apply a base reverse bias, that is, the part where carriers tend to remain when off, which is disadvantageous in terms of improving the switching characteristics and the safe operating area. It is desirable to have a structure in which such a portion is not present on the chip as much as possible, and even with the same structure, there is still room for improvement.

Furthermore, although this problem can be avoided to some extent by scaling down the entire device, that is, by making the pattern finer, since the device is an element that handles a large current, it is difficult to miniaturize it.

There are inherent limitations, especially in terms of the width of the emitter electrode.

Therefore, in the conventional device structure, as shown in FIG. 4, a method is adopted in which the area is reduced simply by partially removing the emitter at the part farthest from the base contact. This method was effective in one respect. However, this emitter area is
It is also a key point for the device's characteristics such as current amplification factor, short-circuit tolerance, and safe operating area, so it is preferable not to reduce its area as much as possible.

This invention was made to solve these conventional problems, and its purpose is to suppress the decrease in the current amplification factor even at large currents, and to improve the switching characteristics. and the safe operating area. An object of the present invention is to provide a power semiconductor device of this type.

[Means to solve the problem]

In order to achieve the above object, a power semiconductor device according to the present invention includes a semiconductor substrate of a first conductivity type serving as a collector region, a base region of a second conductivity type formed on the semiconductor substrate, and a base region of the base region. an emitter of a first conductivity type formed by subdividing the base region into a plurality of parts to form a staggered arrangement pattern at a depth that does not penetrate the base region; and surrounded by the base region; A base contact is formed in each base region that is subdivided into a plurality of parts in the staggered arrangement pattern.

[For production]

That is, in this invention, the base region is subdivided into a plurality of parts by the emitter region to form a staggered arrangement pattern, and the base contact is formed within the base region, so that the connection between the emitter region and the base contact is By effectively reducing the distance, the peripheral length of the emitter relative to the emitter area can be increased, and the effective area of the emitter region can be increased, improving local current concentration and increasing the current amplification factor even at large currents. Therefore, it is possible to suppress the decrease in performance to a small extent, and sufficient effects can be expected in terms of improvement in switching characteristics and safe operation area.

〔Example〕

Embodiments of the power semiconductor device according to the present invention will be described in detail below with reference to FIGS. 1 and 2.

FIGS. 1(a) and 1(b) show an embodiment of the device according to the present invention.
A plan view showing the main part of the planar pattern configuration of the power transistor used, a cross-sectional view taken along the line If-Ih, and a second
The figure is a plan view showing the main part of the planar pattern configuration of a power transistor to which the same embodiment is applied, and the first
In each of the embodiment configurations shown in FIGS.
The same reference numerals as in the conventional structure shown in the figures through FIG. 5 represent the same or corresponding parts.

First, the configuration of an embodiment shown in FIGS. 1(a) and 1(b) will be described.

That is, also in the configuration of the embodiment shown in FIGS. 1(a) and 1(b), the reference numeral 1-a indicates the first
A conductivity type high resistance collector layer t-b is a first conductivity type low resistance collector layer which also serves as a collector region and constitutes a semiconductor substrate; 1 a base region of a second conductivity type opposite to the conductivity type; 3 an emitter region of a first conductivity type formed in the base region 2; 4. and 5 are base contacts and emitter contacts, respectively; 8, 7. and 8 are a base electrode, an emitter electrode, and a collector electrode, respectively.

In this embodiment configuration, a base region 2. is subdivided by an emitter region 3. and base contact 4
are arranged in a staggered manner, and with this configuration,
As described below, the peripheral length of the emitter relative to the emitter area can be further increased, and the effective area of the emitter region can be increased, which also improves local current concentration and amplifies the current even at large currents. In addition to suppressing the reduction in efficiency, it is also possible to reduce the number of emitters separated from the base contact, so that sufficient effects can be expected in terms of improved switching characteristics and safe operating area.

In addition, in the display of FIG. 1(a), it may be the base.

Although the emitter electrodes 6.7 appear to be independent, they are actually connected to each other.

In the case of the embodiment shown in FIGS. 1(a) and 1(b), the portion including the base region 2 and the base contact 4 which are subdivided by the emitter region 3 and arranged in a staggered manner,
In other words, each portion 8 surrounded by a dotted line in the figure can be regarded as a unit of a substantially minute transistor, and the width of one unit of a minute transistor indicated by this portion 8 is W, When the width of the base region 2 is L, the arrangement of these minute transistors is set in a staggered pattern in which each column is shifted by W/2. That is, the arrangement in the case of the configuration of the embodiment shown in FIG.
This is different from the arrangement of grid patterns arranged in parallel in each column in the prior art configurations of FIGS. 3 and 4 described above.

Next, in the device configuration of this type of power transistor, there are problems in terms of improving switching characteristics and improving the safe operating area. To compare the existence of
Here, X is the distance between one point of the emitter farthest from the base contact and the end point of the emitter pattern on the straight line connecting this point and the center point of the base contact.

This distance glx will be compared between the case of the embodiment configuration shown in FIG. 1(a) and the case of the conventional example configuration shown in FIG. 3(a).

Incidentally, the main effect of the resistance of the base region that limits the base current is the resistance of the base region directly below the emitter region, whose thickness is reduced by the emitter region. In this case, we compared the distance fax corresponding to the same area, but of course, calculating the accurate resistance value in this area requires more precise calculation, and this distance #X It cannot be said that it directly represents the resistance value, but this distance #X is
Since it can be a useful guide when considering the resistance of the base region that limits the base current, this distance x will be used in this section.

The actual measured value of distance #X in the case of the embodiment configuration shown in FIG. 1(a) is as follows:
X=0.559(W-L) Tear'l1. m, tt vs 1. , Fig. 3(a) The actual measured value of the distance X in the case of the conventional configuration is , it is possible to significantly reduce the value of the same distance It can be seen that the following improvements have been made.

First, in the configuration of the embodiment shown in FIGS. 1(a) and 1(b), the power transistor in which the base region 2° subdivided by the emitter region 3 and the base contacts 4 are arranged in a staggered manner is arranged in the lattice shape. In a conventional power transistor with an arrangement of , the same effect as that obtained by making the most minute pattern even finer by about 21% can be achieved.

That is, with these features, it is possible to easily improve the switching characteristics, the safe operation area, etc. without taking measures such as removing the emitter pattern as in the conventional configuration. It should be noted that if an appropriate emitter pattern cutting means is used in combination with the structure of this embodiment, it is possible to improve the negative layer. As another example configuration, an example of the structure in this case, that is, a structure in which appropriate emitter pattern cutting is applied, is shown in FIG.

Furthermore, in the configuration of the embodiment shown in FIGS. 1(a) and 1(b), even if the transistors are of the same size, the value of X is 0.707 (W -L) is reduced to 0.559 (W-I, ), so even within each tiny transistor, the difference in distance between the emitter closest to the base contact and the emitter farthest from the base contact is small. This improves the balance in terms of movement, and -
A layered, uniform effect can be obtained.

〔Effect of the invention〕

As described in detail above, according to the present invention, there is provided a semiconductor substrate of a first conductivity type serving as a collector region, a base region of a second conductivity type formed on this semiconductor substrate, and a penetrating portion formed in the base region. The base region is formed in a staggered arrangement pattern by subdividing the base region into a plurality of parts, and is surrounded by the base region.
In addition to providing a conductive type emitter region, a base contact is formed within each base region subdivided into a plurality of parts in a staggered arrangement pattern.
The staggered array pattern configuration of the base region and base contact, which are subdivided by the emitter region, maintains a high current amplification factor at large currents of the transistor, improves switching characteristics, and improves the safe operating area. even more compared to traditional configurations.

It can provide excellent electrical characteristics.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are plan views showing essential parts of the planar pattern configuration of a power transistor to which an embodiment of the present invention is applied, and Ib-Ib! 2 is a sectional view of the J1 section, and FIG. 2 is a plan view showing the main part of the planar pattern configuration of a power transistor to which another embodiment of the above device is applied, and FIGS. Figure 5 (a), (b)
) are plan views showing the main parts of the planar pattern configuration of conventional individual power transistors, and mb
-mb to vb-vb line sections, respectively. 1-a... High resistance collector layer, 1-b... Low resistance collector layer, 2... Base region, 3... Emitter region, 4... Base contact, 5... ...Emitter contact, 6...Base electrode, 7...
Emitter electrode, 8... Portion considered as one unit of a microtransistor, 8... Collector electrode. Agent Masuo Oiwa 1st figure 4; Bezukoshi 71-5; Emi Tsutafun 771- 6: He-Su 2L 7; Emi, 7th child L 8: 5B 1st grade - Ranjis Z's- , jp- rank? ζji-like, Lr: Q4 Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] A semiconductor substrate of a first conductivity type that becomes a collector region. A base region of a second conductivity type formed on this semiconductor substrate, and a staggered arrangement pattern in which the base region is subdivided into a plurality of parts at a depth that does not penetrate into the base region. a base contact in each base region subdivided into a plurality of parts in the staggered arrangement pattern; A power semiconductor device characterized in that it is formed by forming.