JPH06224445A - Static-induction semiconductor device - Google Patents

Abstract

PURPOSE:To shorten the development time of the title semiconductor device by easily designing a mask without lowering an electric characteristic. CONSTITUTION:A static-induction semiconductor device 1 is constituted in such a way that a plurality of unit cells 3 are arranged on a semiconductor substrate 2 so as to be adjacent in the plane direction, that the inner side is used as cathode regions 11 in the surface part of the individual unit cells and that the outer side is used as gate regions 12. In the static-induction semiconductor device, shapes as viewed from the surface side of the substrate of the individual unit cells are equilateral triangles, and the gate regions surround the cathode regions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a static induction semiconductor device having a surface gate type structure.

[0002]

2. Description of the Related Art As a static induction semiconductor device having a surface gate type structure, there is a surface gate type static induction thyristor having a structure shown in FIG. Static induction thyristor 51
, A plurality of unit cells 60, 60, ... Are arranged adjacent to each other in the surface direction on the semiconductor substrate 52, and the inner surface of one side of each unit cell 60 is a cathode region (n ⁺ region) 61.
And the outside is a gate region (p ⁺ region) 62, and the other surface portion is an anode region (p ⁺ region) 63. Between the cathode region 61 and the anode region 63 is a current path. Is a high specific resistance region (n ⁻ region) 64.

As shown in FIG. 8, the unit cell 60 has a rectangular shape (surface shape) as viewed from the substrate surface side, and stripes in which outer gate regions 62 are arranged in parallel on both sides of an inner cathode region 61. It is shaped like a shape. The static induction thyristor 51 has a low on-voltage and a low gate resistance because the gate region and the gate electrode are in contact with each other on the surface of the semiconductor substrate 52, and is capable of high-speed operation at turn-off. It can be said that the semiconductor device is suitable for. In particular, the current capacity per unit area of the cathode region is large, and it is possible to realize a low on-voltage or a large current capacity with a small cathode area.

[0004]

However, in the case of the conventional electrostatic induction thyristor 51, it is difficult to design the mask used for forming the gate region and the cathode region in the manufacturing process. In the case where the cathode region and the gate region on the surface of the unit cell 60 are in the form of parallel stripes, it is difficult to treat the end portion of the unit cell aggregation region (active region) or the electrode pad portion. is there. This mask design difficulty cannot be solved even by the recent design technology using CAD. When changing the current capacity of the electrostatic induction thyristor, a mask with a different unit cell assembly area is required, but the mask design at this time is also not easy and quite difficult.

In view of the above circumstances, the present invention provides an electrostatic induction semiconductor device in which the mask design can be facilitated and the development time can be shortened without deteriorating the electrical characteristics that are characteristic of the electrostatic induction semiconductor device. This is an issue.

[0006]

In order to solve the above-mentioned problems, in the electrostatic induction semiconductor device of the present invention, a plurality of unit cells are arranged adjacent to each other in a plane direction on a semiconductor substrate, and the surface of each unit cell is In the electrostatic induction semiconductor device, in which the inside is a cathode region and the outside is a gate region, the unit cell has an equilateral triangle when viewed from the substrate surface side, and the gate region is formed so as to surround the cathode region. It is characterized by being

The electrostatic induction semiconductor device of the present invention includes an electrostatic induction thyristor and an electrostatic induction transistor. In the case of a transistor, the cathode is usually called the source and the anode is called the drain.

[0008]

In the electrostatic induction semiconductor device, if there is a gap between the unit cells, there is a disadvantage in terms of chip size and characteristics.
It is important that the substrates have such a shape that they can be arranged side by side without any gap in the surface direction of the substrate. As the shapes of the unit cells that can be arranged without a gap, there are three kinds of shapes, namely, a regular triangle, a regular quadrangle, and a regular hexagon when viewed from the substrate surface side. In the case of the present invention, since the shape of the unit cells viewed from the substrate surface side is an equilateral triangle, the unit cells can be arranged adjacent to each other without a gap in the surface direction of the substrate.

Since the cathode region is surrounded by the gate region on the surface portion of the unit cell, the treatment at the end portion of the unit cell assembly region and the treatment at the pad portion are easy. As shown in FIG. 8, when the cathode region is not completely surrounded by the gate region on the surface of the unit cell, the treatment at the end of the unit cell assembly region and the treatment at the pad portion are not easy.

Even when the current capacity is changed, the state of the end of the unit cell assembly area is almost the same by simply connecting the unit cells, and the size of the unit cell assembly area is changed without any problem to change the current capacity. Therefore, it is easy to design the mask when changing the current capacity. 3 to 5 respectively show the surface shapes of the unit cells 3 of the above-mentioned three types. As shown in FIG. 6, the width of the cathode region 61 on the surface of the conventional unit cell is WG, the width of the gate region 62 is XJ, and the length is WG + 2.
XJ, and the ratio of the cathode region 61 to the entire surface area of the unit cell is 1. On the other hand, as shown in FIGS. 3 to 5, the inside of a circle concentric with the inscribed circle on the surface of the unit cell 3 of the above-mentioned three types and whose distance from each side is XJ is the cathode region 11, and The ratio of the cathode region 11 to the entire surface area of the unit cell 3 when the outside is the gate region 12 is as follows when compared with the case of FIG.

In the case of FIG. 6: In the case of FIG. 3: In the case of FIG. 4: In the case of FIG. 5 = 1: 1.2: 1.6: 1.8. That is, in the case of the regular quadrangle and the regular hexagon of FIGS. 4 and 5, there is a possibility that the fluctuation may be 50% or more as compared with the conventional case and the characteristic may be deteriorated. However, in the case of the regular triangle of FIG. Compared to the conventional case of No. 6, there is only a fluctuation of about 20%, so there is no fear of deterioration of the characteristics.

[0012]

Embodiments of the present invention will now be described with reference to the drawings. It goes without saying that the present invention is not limited to the following embodiments. FIG. 1 shows a state where the unit cell assembly region of the electrostatic induction thyristor of the embodiment is viewed from the substrate surface. FIG. 2 shows a cross section at the position shown by the alternate long and short dash line in FIG.

In the semiconductor substrate 2 of the electrostatic induction thyristor 1 of the embodiment, a large number of unit cells 3, 3, ... Are arranged adjacent to each other in the plane direction. The shape of each unit cell 3, 3, ... Is an equilateral triangle when viewed from the substrate surface side, and they are arranged without gaps.
On the front surface of each unit cell 3, the inside is a cathode region (n ⁺ region) 11 and the outside is a gate region (p ⁺ region) 12, and the back surface is an anode region (p ⁺ region). 13 between the cathode region 11 and the anode region 13 and serves as a high specific resistance region (n
^- area) is 14. In the surface portion of each unit cell 3, the inner cathode region 11 is surrounded by the outer gate region 12.

In designing a mask, the shape of the unit cell 3 is prepared in advance according to the fine level of the process and the electrical characteristics of the device, and is appropriate according to the electrical characteristics of the specifications or the level of the process miniaturization technology. The shape of the unit cell 3 is selected to design the mask. The present invention is not limited to the above embodiment. In FIG. 2, p in the anode region
^{The case where the +} type region becomes the n ⁺ type region can be given as an example in the case of the static induction transistor.

[0015]

In the electrostatic induction semiconductor device according to the present invention, since the shape of the unit cells viewed from the substrate surface side is an equilateral triangle, the unit cells can be arranged side by side without any gap, and at the surface portion of the unit cell. Since the cathode area is surrounded by the gate area, it is easy to process at the edge of the unit cell assembly area and at the pad area, so the mask design is easy and development time can be shortened. Since the ratio of the surface area of the unit cell in the total area is not so different from the conventional one, there is no fear of deterioration of characteristics, and therefore the present invention is very useful.

[Brief description of drawings]

FIG. 1 is a plan view showing a unit cell assembly area of an electrostatic induction thyristor of an embodiment.

FIG. 2 is a sectional view of FIG.

FIG. 3 is a plan view showing an example of a planar shape of a unit cell according to the present invention.

FIG. 4 is a plan view showing an example of a planar shape of a reference unit cell.

FIG. 5 is a plan view showing a planar shape example of a reference unit cell.

FIG. 6 is a plan view showing an example of a planar shape of a conventional unit cell.

FIG. 7 is a cross-sectional view showing a main part configuration of a conventional electrostatic induction thyristor.

8 is a plan view showing a planar shape of a unit cell of the electrostatic induction thyristor of FIG.

[Explanation of symbols]

 1 electrostatic induction thyristor 2 semiconductor substrate 3 unit cell 11 cathode region 12 gate region 13 anode region 14 high resistivity region

Claims (1)

[Claims] 1. A static induction semiconductor device in which a plurality of unit cells are arranged adjacent to each other in a plane direction on a semiconductor substrate, and inside of a surface portion of each unit cell is a cathode region and outside is a gate region. An electrostatic induction semiconductor device, wherein the unit cell has a shape of an equilateral triangle when viewed from the substrate surface side, and the gate region is formed so as to surround the cathode region.