JPH01253929A - Film carrier tape for manufacture of semiconductor device - Google Patents

Film carrier tape for manufacture of semiconductor device

Info

Publication number
JPH01253929A
JPH01253929A JP8149788A JP8149788A JPH01253929A JP H01253929 A JPH01253929 A JP H01253929A JP 8149788 A JP8149788 A JP 8149788A JP 8149788 A JP8149788 A JP 8149788A JP H01253929 A JPH01253929 A JP H01253929A
Authority
JP
Japan
Prior art keywords
lead
radiation
film
tape
carrier tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8149788A
Other languages
Japanese (ja)
Other versions
JPH0628274B2 (en
Inventor
Tsutomu Yamashita
力 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8149788A priority Critical patent/JPH0628274B2/en
Publication of JPH01253929A publication Critical patent/JPH01253929A/en
Publication of JPH0628274B2 publication Critical patent/JPH0628274B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Wire Bonding (AREA)

Abstract

PURPOSE:To check thermal contraction of a film carrier tape at the time of mounting a semiconductor chip by setting up metal patterns for radiation made of a metal foil around the openings for mounting semiconductor chips of an insulating film. CONSTITUTION:Broad metal patterns 5 for radiation formed in the integrated shape with lead conductor pieces on a film tape 1 and wirings 4 for plating are formed in the integrated shape with these broad metal patterns 5 for radiation on the film tape 1 are formed being respectively connected with an outer lead bonding(OLB) part 6 of the lead conductor pieces so as to surround the peripheries of the openings for placing semiconductor chips. Further, the substrates of a plurality of lead conductor pieces, metal patterns 5 for radiation and wirings 4 are all made, for instance, of copper foils and their surfaces are coated with gold plating. Thereby, thermal contraction of the film tape 1 in an inner lead bonding(ILB) can be suppressed by a heat radiation effect of the metal patterns 5 for radiation.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置製造用フィルム・キャリア・テープ
に関し、特に高密度実装を要求されるフィルム・キャリ
ア・テープに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a film carrier tape for manufacturing semiconductor devices, and particularly to a film carrier tape that requires high-density packaging.

〔従来の技術〕[Conventional technology]

従来の半導体装置製造用フィルム・キャリア・テープは
、その面上に搬送及び位置決め用のスプロケット・ホー
ルと、半導体チップ載置用の開口部と、半導体チップの
バンプ電極と熱圧着法または共晶法で電気接続されるリ
ードおよび電気選択用パッドと、このリードおよび電気
選択用パッドの表面に金メツキ電流を供給するメツキ用
配線とを形成するポリイミド樹脂等の絶縁フィルムから
電気選別のためのパッドと一体化さ7して形成さjLる
Conventional film carrier tape for semiconductor device manufacturing has sprocket holes for transportation and positioning on its surface, openings for mounting semiconductor chips, and bump electrodes of semiconductor chips that are bonded by thermocompression bonding or eutectic bonding. A pad for electrical selection is formed from an insulating film such as a polyimide resin that forms a lead and an electrical selection pad that are electrically connected to each other, and a plating wiring that supplies a gold plating current to the surface of the lead and electrical selection pad. It is formed by integrating 7.

通常、このフィルム・キャリア・テープは半導体チップ
を載置した状態で電気選別およびバイアス試験を実施し
た後リードを所望の長さに切断してアウター・リード・
ボンディング部を形成する。
Normally, this film carrier tape is made by carrying out electrical selection and bias testing with the semiconductor chip mounted thereon, and then cutting the leads to the desired length to create the outer leads.
Form a bonding part.

このとき、リードの数が多い多数ビンの場合は、リード
のアウター・リード・ボンディング部のばらけを防止す
るため、フィルム・キャリア・テープを構成する絶縁フ
ィルムをアウター・リードの外端に残す方法が用いられ
ることが多い。ついで、例えばプリント基板や一般のリ
ード・フレーム上のボンディング・パッドにアウター・
リード・ボンディング部がボンディング接続される。
At this time, in the case of multiple bottles with a large number of leads, in order to prevent the outer lead bonding part of the leads from coming apart, there is a method of leaving the insulating film that makes up the film carrier tape on the outer edge of the outer lead. is often used. The outer wire is then applied to bonding pads on, for example, a printed circuit board or a typical lead frame.
The lead bonding section is bonded and connected.

このようにフィルム・キャリア・テープでは、ボンディ
ング作業がリードの数と無関係に1回で済むので工程ス
ピードが速く、また、ボンディング等の組立作業および
電気選別作業の自動化がはかれるので、量産性に優れる
等の利点を有している。
In this way, film carrier tape requires only one bonding operation regardless of the number of leads, so the process speed is fast, and assembly work such as bonding and electrical sorting work can be automated, making it excellent for mass production. It has the following advantages.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上述した従来のフィルム・キャリアを用
いて、半導体チップとリード先端のインナー・リード・
ボンディング部とをインナー・リード・ボンディング(
以)ILBと記す)する場合には、フィルム・キャリア
のリードとチップのバンプとの接着に約400”C〜5
00−Cの高熱が必要とされる。この際、高熱はリード
を介してフィルム・キャリアの絶縁フィルムに伝わるの
で絶縁フィルムの熱収縮が起こる。この収縮量は、例え
ばポリイミド樹脂フィルムの場合であれば、この材料の
りス縮特性は一般に知られ1いるように、温度250゛
C1加熱時間30分で約0.3%であるが、ILBの所
要時間は僅か数秒にすぎないものの温夏が約400℃〜
500”Cと極めて高いためもあって、同じように約0
.3%の加熱収縮が起こる。すなわち、テープ長101
1当シ約30μ仇の収縮が起こる。従って、アウター・
リード・ボンディング部のリード数が200〜300本
以上、ピッチが150μm以下のテープであれば、端子
リード部には225μm〜33.8μm収縮が起き、ア
ウター・リード・ボンディング(以下OLBと記す)を
行なう際、隣りのOLBパッドとショートしてしまうと
いう好ましからざる問題が生じている。
However, using the conventional film carrier described above, the inner lead
Inner lead bonding (
(hereinafter referred to as ILB), approximately 400" C to 5
High heat of 00-C is required. At this time, the high heat is transmitted to the insulating film of the film carrier through the leads, causing thermal contraction of the insulating film. For example, in the case of a polyimide resin film, the shrinkage property of this material is approximately 0.3% at a temperature of 250°C and a heating time of 30 minutes, as is generally known1. Although it only takes a few seconds, the temperature in summer is around 400℃~
Because it is extremely high at 500"C, it also has a temperature of about 0.
.. A heating shrinkage of 3% occurs. That is, the tape length is 101
Shrinkage of approximately 30 μm occurs per serving. Therefore, the outer
If the number of leads in the lead bonding part is 200 to 300 or more and the pitch is 150 μm or less, the terminal lead part will shrink by 225 μm to 33.8 μm, causing outer lead bonding (hereinafter referred to as OLB). When this is done, an undesirable problem arises in that short circuits occur with adjacent OLB pads.

不発明の目的は、上記の問題点に鑑み、半導体チップと
リードとのインナー・リード・ボンディングにおける熱
収縮を緩和した半導体装置製造用フィルム・キャリア・
テープを提供することである。
In view of the above-mentioned problems, the object of the invention is to provide a film/carrier for semiconductor device manufacturing that alleviates thermal shrinkage in inner lead bonding between semiconductor chips and leads.
The purpose is to provide tapes.

〔課題を解決するだめの手段〕[Failure to solve the problem]

本発明によれば、半導体装置製造用フィルム・キャリア
・テープは、絶縁フィルム・テープと、前記フィルム・
テープの側縁部および中心部にそnぞれ開孔されるスプ
ロケット・ホールおよび半導体チップ載置用開口部と、
前記半導体チップ載置用開口部内にインナー・リード・
ボンディング部を突出させて形成される複数個のリード
導体片と、前記複数個のリード導体片のアウター・リー
ド・ボンディング部とそれぞれ接続さtL前記半導体チ
ップ載置用開口部を取囲むようにリード導体片と一体化
形状に形成される幅広の放熱用金属パターンと、カ」記
放熱用金属パターンと一体化形状に形成されるメツキ用
配線とを備えることを含んで構成される。
According to the present invention, a film carrier tape for semiconductor device manufacturing includes an insulating film tape and the film carrier tape.
A sprocket hole and a semiconductor chip mounting opening are formed at the side edges and the center of the tape, respectively;
Inner leads are placed inside the semiconductor chip mounting opening.
A plurality of lead conductor pieces formed with protruding bonding portions are connected to the outer lead bonding portions of the plurality of lead conductor pieces, respectively, and leads are formed so as to surround the semiconductor chip mounting opening. The present invention includes a wide metal pattern for heat radiation formed integrally with the conductor piece, and a wiring for plating formed integrally with the metal pattern for heat radiation.

〔実施例〕〔Example〕

以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.

第1図は本発明の一実施例を示す半導体装置製造用フィ
ルム・キャリア・テープの部分平面図である。本実施例
によれば、フィルム・キャリア・テープはその第1象限
部分のみが示され、ポリイミド樹脂からなる絶縁フィル
ム・テープ1と、このフィルム・テープ1の側縁端部お
よび中心部にそれぞれ開孔されたスプロケット・ホール
2および半導体チップ載置用開口部10と、この半導体
チップ載置用開口部10内にインナー・リード・ボンデ
ィング(ILB)部3を突出させてフィルム・テープ1
上に形成された複数個のリード導体片と、このリード導
体片のアウター・リード・ポンチインク(OLB)部6
とそれぞれ接続さn半導体チップ載置用開口部の周囲を
取囲むようにフィルム・テープ1上にリード導体片と一
体化形状に形成された幅広の放熱用金属パターン5と、
この幅む。ここで、7および8は半導体チップ載置用開
口部および放熱用金属パターン5のそれぞれの縁を示し
、また、複数個のリード導体片、放熱用金属パターン5
およびメツキ用配線4はいずれも基体は銅箔から成シ、
その表面はメツキ用配線4を介するメツキ工程によシ金
メツキ被覆される。本Φ 実施例によれば、メツキ用配線の線幅lが0.4〜1、
01111であるとき、放熱用金属パターン5のパター
ン幅L1.L2をそれぞ扛20〜4.0關に設定すると
、放熱用金属パターン5の熱放散効果によfiILBに
おけるフィルム・テープ1の熱収縮を従来の0.3%か
ら0.1%以下にまで抑止することができる。すなわち
、プリント基板等のOLBパッドとリード導体片のOL
B部6との位置合わせが正確に行ない得るようになる。
FIG. 1 is a partial plan view of a film carrier tape for manufacturing semiconductor devices showing an embodiment of the present invention. According to this embodiment, only the first quadrant of the film carrier tape is shown, and there is an insulating film tape 1 made of polyimide resin and openings at the side edges and center of the film tape 1, respectively. A sprocket hole 2 and a semiconductor chip mounting opening 10 are formed, and an inner lead bonding (ILB) portion 3 is protruded into the semiconductor chip mounting opening 10 to form a film tape 1.
A plurality of lead conductor pieces formed above and an outer lead punch ink (OLB) portion 6 of this lead conductor piece.
a wide metal pattern 5 for heat dissipation formed integrally with the lead conductor piece on the film tape 1 so as to surround the opening for mounting the semiconductor chip, and
This width is wide. Here, 7 and 8 indicate the respective edges of the semiconductor chip mounting opening and the heat dissipation metal pattern 5, and also the plurality of lead conductor pieces and the heat dissipation metal pattern 5.
The base of the plating wiring 4 is made of copper foil,
Its surface is coated with gold plating through the plating wiring 4 in a plating process. According to this Φ example, the line width l of the plating wiring is 0.4 to 1,
01111, the pattern width L1. of the heat dissipation metal pattern 5 is When L2 is set between 20 and 4.0, the thermal shrinkage of the film/tape 1 in FILB is reduced from the conventional 0.3% to 0.1% or less due to the heat dissipation effect of the heat dissipation metal pattern 5. It can be suppressed. In other words, the OLB pad of the printed circuit board etc. and the OL of the lead conductor piece
Positioning with the B section 6 can now be performed accurately.

なお、放熱用金属パターン5をフィルム・テープ1の裏
面に併置すれば、より一層大きな効果を奏し得る。
Note that if the metal pattern 5 for heat dissipation is placed side by side with the back surface of the film/tape 1, an even greater effect can be achieved.

第2図は本発明の他の実施例を示す半導体装置製造用フ
ィルム・キャリア・テープの部分平面図である。本実施
例によれば、フィルム・キャリア・テープは同じくその
第1象限のみが示され、前実施例とは異なシ放熱用金属
パターン5の縁が半導体チップ載置用開口部10内に幅
1.,12だけ突出するように形成される。本実施例に
よれば、放熱用金属パターン5の放熱効果は一層大きく
なυ、例えば、メツキ用配線4の線幅lを0.4〜1,
0)としたとき、放熱用パターンの幅り、、L、を2.
0〜4.0 %、突出し幅1x、lzを1.0〜201
に設定すると、絶縁フィルム・テープ1の熱収縮を非常
に小さな約α05%以下におさえることが可能で。
FIG. 2 is a partial plan view of a film carrier tape for manufacturing semiconductor devices showing another embodiment of the present invention. According to this embodiment, only the first quadrant of the film carrier tape is shown, and unlike the previous embodiment, the edge of the metal pattern 5 for heat dissipation is placed within the semiconductor chip mounting opening 10 with a width of 1. .. , 12 are formed to protrude. According to this embodiment, the heat dissipation effect of the heat dissipation metal pattern 5 is further increased by setting the line width l of the plating wiring 4 to 0.4 to 1.
0), the width of the heat dissipation pattern, L, is 2.
0-4.0%, protrusion width 1x, lz 1.0-201
When set to , it is possible to suppress the thermal shrinkage of the insulating film/tape 1 to a very small level of approximately α05% or less.

リードのOLB部6の寸法をILBを行りた前後でほと
んど変化しないようにすることができる。
The dimensions of the OLB portion 6 of the lead can be made almost unchanged before and after ILB is performed.

この効果によりプリント基板上等のOLBパッドとリー
ド導体片のOLB部6との正確な位置合せを行うことが
できるので、OLB工程において隣シのOLEパッドと
の間にショートを発生せしめる等の従来の問題点は解決
される。
This effect allows accurate alignment between the OLB pad on the printed circuit board and the OLB portion 6 of the lead conductor piece, which eliminates the conventional problem of short circuits between adjacent OLE pads during the OLB process. problem is solved.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明によnば、フィルム
・キャリア・テープを構成する絶縁フィルムの半導体チ
ップ載置用開口部の周辺に銅等の金属箔からなる放熱用
金属パターンを設定することによシ半導体チップ搭載時
のフィルム・キャリア・テープの熱収縮をほぼ完全に抑
止することができ、プリント基板上等のOLB部パッド
とICのリードのOLB部との正確な位置合せが行ない
得るので、高密度実装を要求されるフィルム・キャリア
・テープ、例えばリードのOLB数が200本から30
0本以上でリードピッチが150μm以下という長尺の
フィルム・キャリア・テープに実態すれば生産歩留シの
向上に顕著なる効果をあげることができる。
As explained in detail above, according to the present invention, a heat dissipation metal pattern made of metal foil such as copper is set around the semiconductor chip mounting opening of the insulating film constituting the film carrier tape. In particular, thermal shrinkage of the film carrier tape when mounting a semiconductor chip can be almost completely suppressed, and the OLB part pad on the printed circuit board etc. and the OLB part of the IC lead can be accurately aligned. Therefore, film carrier tapes that require high-density packaging, for example, the number of lead OLBs is 200 to 30.
If applied to a long film carrier tape with a lead pitch of 0 or more and a lead pitch of 150 μm or less, it can have a remarkable effect on improving production yield.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す半導体装置製造用フィ
ルム・キャリア・テープの部分平面図、第2図は本発明
の他の実施例を示す半導体装置製造用フィルム・キャリ
ア・テープの部分平面図である。 1・・・絶縁フィルム・テープ、2・・・スプロケット
・ホール、3・・・リードのILB部、4・・・メツキ
用配線、5・・・放熱用金属パターン、6・・・リード
のOLB部、7・・・半導体チップ載置用開口部の縁、
8・・・放熱用金属パターンの縁、10・・・半導体チ
ップ載置用開口部。 代理人 弁理士  内 原   音 革 l 呵 茅 2−rM
FIG. 1 is a partial plan view of a film carrier tape for manufacturing semiconductor devices showing one embodiment of the present invention, and FIG. 2 is a partial plan view of a film carrier tape for manufacturing semiconductor devices showing another embodiment of the invention. FIG. DESCRIPTION OF SYMBOLS 1... Insulating film/tape, 2... Sprocket hole, 3... ILB part of lead, 4... Wiring for plating, 5... Metal pattern for heat radiation, 6... OLB of lead Section 7...Edge of opening for semiconductor chip placement;
8... Edge of metal pattern for heat dissipation, 10... Opening for semiconductor chip placement. Agent: Patent Attorney Uchihara Otoki l 呵茅 2-rM

Claims (1)

【特許請求の範囲】[Claims]  絶縁フィルム・テープと、前記フィルム・テープの側
縁部および中心部にそれぞれ開孔されるスプロケット・
ホールおよび半導体チップ載置用開口部と、前記半導体
チップ載置用開口部内にインナー・リード・ボンディン
グ部を突出させて形成される複数個のリード導体片と、
前記複数個のリード導体片のアウター・リード・ボンデ
ィング部とそれぞれ接続され前記半導体チップ載置用開
口部を取囲むようにリード導体片と一体化形状に形成さ
れる幅広の放熱用金属パターンと、前記放熱用金属パタ
ーンと一体化形状に形成されるメッキ用配線とを備える
ことを特徴とする半導体装置製造用フィルム・キャリア
・テープ。
An insulating film tape and a sprocket with holes formed in the side edges and center of the film tape, respectively.
a hole and an opening for placing a semiconductor chip, and a plurality of lead conductor pieces formed by protruding an inner lead bonding part into the opening for placing a semiconductor chip;
a wide metal pattern for heat dissipation that is connected to the outer lead bonding portions of the plurality of lead conductor pieces and formed integrally with the lead conductor pieces so as to surround the semiconductor chip mounting opening; A film carrier tape for manufacturing semiconductor devices, comprising a plating wiring formed integrally with the heat dissipation metal pattern.
JP8149788A 1988-04-01 1988-04-01 Film carrier tape for semiconductor device manufacturing Expired - Lifetime JPH0628274B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8149788A JPH0628274B2 (en) 1988-04-01 1988-04-01 Film carrier tape for semiconductor device manufacturing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8149788A JPH0628274B2 (en) 1988-04-01 1988-04-01 Film carrier tape for semiconductor device manufacturing

Publications (2)

Publication Number Publication Date
JPH01253929A true JPH01253929A (en) 1989-10-11
JPH0628274B2 JPH0628274B2 (en) 1994-04-13

Family

ID=13748019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8149788A Expired - Lifetime JPH0628274B2 (en) 1988-04-01 1988-04-01 Film carrier tape for semiconductor device manufacturing

Country Status (1)

Country Link
JP (1) JPH0628274B2 (en)

Also Published As

Publication number Publication date
JPH0628274B2 (en) 1994-04-13

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