JPH01251760A - Ferroelectric storage device - Google Patents

Ferroelectric storage device

Info

Publication number
JPH01251760A
JPH01251760A JP63078938A JP7893888A JPH01251760A JP H01251760 A JPH01251760 A JP H01251760A JP 63078938 A JP63078938 A JP 63078938A JP 7893888 A JP7893888 A JP 7893888A JP H01251760 A JPH01251760 A JP H01251760A
Authority
JP
Japan
Prior art keywords
film
diffusion layer
pzt
ferroelectric
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63078938A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63078938A priority Critical patent/JPH01251760A/en
Publication of JPH01251760A publication Critical patent/JPH01251760A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B53/00Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

Abstract

PURPOSE:To enhance the integration density of a ferroelectric storage device by a method wherein a diffusion layer region is formed on a semiconductor substrate and a PZT film is formed on said diffusion layer region directly or via a dielectric film or the like such as an SiO2 film or the like. CONSTITUTION:In a contact part of a MOS type FET composed of a diffusion layer 2, an SiO2 film 4, a gate SiO2 film 5 and a gate electrode 6, burrs and metal of a TiSi film 3 or the like are formed on an Si substrate 1. A PZT film 7 is formed on the whole surface of said MOS type FET by a sputtering method or the like; after that, a hole is made in a contact part other than a storage part 9 in said PZT film 7; an electrode wiring part 8 is formed. The TiSi film 3 may be composed of Ti, Pd, a nitride of them, a silicate film or the like; the storage part 9 may be composed of a dielectric film such as a thin SiO2 film, an Si3N4 film or the like. By this setup, it is possible to form a ferroelectric storage device whose integration density is high; its manufacturing process can be simplified.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置上にPZT強誘電体膜コンデンサを
形成し、該PZT強誘電体膜コンデンサーの電荷蓄積作
用を記憶作用として用いる強誘電体記憶装置の構造に関
する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is a ferroelectric film in which a PZT ferroelectric film capacitor is formed on a semiconductor device, and the charge storage function of the PZT ferroelectric film capacitor is used as a memory function. Regarding the structure of storage devices.

〔従来の技術〕[Conventional technology]

従来、半導体装置上にPZT強誘電体膜を形成した強誘
電体記憶装置は、Electronics /Febr
uary 1 B 、 1988  P、P、91−9
5に示されている如く、まず、半導体装置が形成されて
成る基板上にS1O,膜等の誘電体膜を介して、前記半
導体装置における拡散層から前記誘電体膜に開けられた
コンタクト穴を通して、第1の電極が延在して形成され
、該電極上にPZT膜を部分的に形成し、更に、該PZ
T膜上に第2の電極が形成されて成るのが通例であった
Conventionally, a ferroelectric memory device in which a PZT ferroelectric film is formed on a semiconductor device is manufactured by Electronics/Febr.
uary 1 B, 1988 P, P, 91-9
5, first, on a substrate on which a semiconductor device is formed, a dielectric film such as an S1O film is passed through a contact hole made from a diffusion layer in the semiconductor device to the dielectric film. , a first electrode is formed to extend, a PZT film is partially formed on the electrode, and a PZT film is further formed on the PZT film.
Usually, a second electrode was formed on the T film.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、上記従来技術によると、PZT膜形成による強
誘電体記憶装置に大面積を要し、高集積化に向かないと
云う課題と、強誘電体膜形成領域を限定する為に、強誘
電体膜領域形成工程すなわち、ホト・エツチング工程が
余分に必要となると云う課題があった。
However, according to the above-mentioned conventional technology, a ferroelectric memory device formed by forming a PZT film requires a large area and is not suitable for high integration. There is a problem in that an extra film region forming step, that is, a photo-etching step is required.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を解決するために、本発明は強誘電体記憶装置
に係り、 (1)  半導体基板上に拡散層領域を形成し、該拡散
層領域上に、PZT膜を直接あるいは51o2膜等の誘
電体膜を介して、あるいはT1膜、TiN膜、TiSi
膜やpa膜等の電極膜を介して形成する手段をとる事、
及び、(2)  半導体基板上に5in2膜等の誘電体
膜を介してPZT膜を電極コンタクト部を除くほぼ全面
にわたって形成する手段をとる事、である。
In order to solve the above problems, the present invention relates to a ferroelectric memory device. (1) A diffusion layer region is formed on a semiconductor substrate, and a PZT film is directly applied or a dielectric film such as a 51O2 film is applied on the diffusion layer region. Through body membranes, or T1 membrane, TiN membrane, TiSi
Taking a method of forming via an electrode film such as a membrane or a PA film,
and (2) to form a PZT film over almost the entire surface of the semiconductor substrate except for electrode contact portions via a dielectric film such as a 5in2 film.

〔作用〕[Effect]

(1)  半導体装置基板に開けるコンタクト穴部に限
定してPZT膜による電荷蓄積領域を設げる事は、強誘
電体記憶装置の集積度を向上する作用がある。又、 (2)PZT膜は、絶縁膜であり、記憶部以外に形成し
ても、層間絶縁膜としての作用を果す事が出来、記憶領
域に限定する必要はな(、PZT膜形成後にホト・エツ
チング工程を要する事がない等の作用がある。
(1) Providing a charge storage region made of a PZT film only in a contact hole formed in a semiconductor device substrate has the effect of improving the degree of integration of a ferroelectric memory device. (2) The PZT film is an insulating film, and even if it is formed in areas other than the memory area, it can function as an interlayer insulating film, and there is no need to limit it to the memory area. - It has the effect of not requiring an etching process.

〔実施例〕〔Example〕

以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示す強誘電体記憶装置の断
面図である。すなわち、31基板1上には、拡散層、2
,SiO2膜4.ゲートS10.膜5、及びゲート電極
6から成るMO3型F’E Tのコンタクト部にはTi
51膜3等のパリや、メタルが形成され、該MO8型F
ET表面全体にpzT膜7をスパッタ法等で形成後、該
PZT膜7は記憶部9以外のコンタクト部は穴明けされ
、電極配線8が形成されて成る。
FIG. 1 is a sectional view of a ferroelectric memory device showing one embodiment of the present invention. That is, on 31 substrate 1, there are a diffusion layer, 2
, SiO2 film 4. Gate S10. The contact part of the MO3 type F'ET consisting of the film 5 and the gate electrode 6 is made of Ti.
51 film 3 etc. and metal are formed, and the MO8 type F
After a pzT film 7 is formed over the entire ET surface by sputtering or the like, holes are formed in the PZT film 7 at contact areas other than the memory area 9, and electrode wirings 8 are formed.

TiSi膜3はTi、P(1あるいはそれらの窒化する
いはシリサイド膜等であっても良く、又、記憶部9に於
ては薄いSiO2膜やSi3N4膜等の誘電体膜であっ
ても良い。
The TiSi film 3 may be Ti, P (1) or a nitrided or silicided film of these, and in the storage section 9 it may be a dielectric film such as a thin SiO2 film or Si3N4 film. .

又、PZT膜7は必ずしもコンタクト部を除く全面に形
成する必要はなく、記憶部9に限定して形成されても良
いが、本願の特許請求の範囲第2項では、コンタクト部
を除く全面に形成する必要があるが記憶部9は必ずしも
拡散層2上に形成する必要はない。
Further, the PZT film 7 does not necessarily need to be formed on the entire surface except for the contact portion, and may be formed only on the storage portion 9; Although it is necessary to form the memory section 9, it is not necessarily necessary to form it on the diffusion layer 2.

〔発明の効果〕〔Effect of the invention〕

本発明により、集積度が高い強誘電体記憶装置が形成で
きる効果があり、製作工程が簡単にできる効果がある。
According to the present invention, a ferroelectric memory device with a high degree of integration can be formed, and the manufacturing process can be simplified.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す強誘電体記憶装置の断
面図である。 1・・・・・・・・・S1基板 2・・・・・・・・・拡散層 5・・・・・・・・・TiSi膜 4・・・・・・・・・Sin、膜 5・・・・・・・・・ゲート5in21%6・・・・・
・・・ゲート電極 7・・・・・・・・・PZT膜 8・・・・・・・・・電極配線 9・・・・・・・・・記憶部 以上 出願人 セイコーエプソン株式会社
FIG. 1 is a sectional view of a ferroelectric memory device showing one embodiment of the present invention. 1...S1 substrate 2...Diffusion layer 5...TiSi film 4...Sin, film 5 ......Gate 5in21%6...
... Gate electrode 7 ... PZT film 8 ... Electrode wiring 9 ... Memory section and above Applicant: Seiko Epson Corporation

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板上には拡散層領域が形成され、該拡散
層領域上には鉛・ジルコニウム・チタン酸(PZT)か
ら成る強誘電体膜が、直接あるいはSiO_2膜等の誘
電体膜を介して、あるいはTi膜、TiN膜、TiSi
膜やPd膜等の電極膜を介して形成されて成る事を特徴
とする強誘電体記憶装置。
(1) A diffusion layer region is formed on the semiconductor substrate, and a ferroelectric film made of lead, zirconium, titanate (PZT) is formed on the diffusion layer region, either directly or through a dielectric film such as a SiO_2 film. Or Ti film, TiN film, TiSi
A ferroelectric memory device characterized in that it is formed through an electrode film such as a film or a Pd film.
(2)半導体基板上にSiO_2膜等の誘電体膜を介し
て、鉛、ジルコニウム、チタン酸から成る強誘電体膜が
電極コンタクト部を除くほぼ全面にわたって形成されて
成る事を特徴とする強誘電体記憶装置。
(2) A ferroelectric device characterized in that a ferroelectric film made of lead, zirconium, and titanic acid is formed on a semiconductor substrate via a dielectric film such as a SiO_2 film over almost the entire surface excluding the electrode contact portion. Body memory device.
JP63078938A 1988-03-31 1988-03-31 Ferroelectric storage device Pending JPH01251760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63078938A JPH01251760A (en) 1988-03-31 1988-03-31 Ferroelectric storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63078938A JPH01251760A (en) 1988-03-31 1988-03-31 Ferroelectric storage device

Publications (1)

Publication Number Publication Date
JPH01251760A true JPH01251760A (en) 1989-10-06

Family

ID=13675822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63078938A Pending JPH01251760A (en) 1988-03-31 1988-03-31 Ferroelectric storage device

Country Status (1)

Country Link
JP (1) JPH01251760A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03218680A (en) * 1990-01-24 1991-09-26 Toshiba Corp Semiconductor memory device and manufacture thereof
WO1991016731A1 (en) * 1990-04-24 1991-10-31 Seiko Epson Corporation Semiconductor device having ferroelectric material and method of producing the same
WO1991019321A1 (en) * 1990-06-01 1991-12-12 Seiko Epson Corporation Method of manufacturing semiconductor device
WO1991019322A1 (en) * 1990-06-01 1991-12-12 Seiko Epson Corporation Method of manufacturing semiconductor device
WO1992002050A1 (en) * 1990-07-24 1992-02-06 Seiko Epson Corporation Semiconductor device provided with ferroelectric material
WO1992002048A1 (en) * 1990-07-24 1992-02-06 Seiko Epson Corporation Method of manufacturing semiconductor device
WO1992002049A1 (en) * 1990-07-24 1992-02-06 Seiko Epson Corporation Semiconductor device
WO1992002955A1 (en) * 1990-08-07 1992-02-20 Seiko Epson Corporation Semiconductor device
US5343353A (en) * 1991-08-28 1994-08-30 Hitachi, Ltd. Semiconductor device and process of producing the same
US5384729A (en) * 1991-10-28 1995-01-24 Rohm Co., Ltd. Semiconductor storage device having ferroelectric film
EP1244144A1 (en) * 1999-12-14 2002-09-25 Matsushita Electric Industrial Co., Ltd. Nonvolatile memory and method of driving nonvolatile memory
US6940741B2 (en) 1990-08-03 2005-09-06 Hitachi, Ltd. Semiconductor memory device and methods of operation thereof

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03218680A (en) * 1990-01-24 1991-09-26 Toshiba Corp Semiconductor memory device and manufacture thereof
WO1991016731A1 (en) * 1990-04-24 1991-10-31 Seiko Epson Corporation Semiconductor device having ferroelectric material and method of producing the same
KR100349999B1 (en) * 1990-04-24 2002-12-11 세이코 엡슨 가부시키가이샤 Semiconductor device with ferroelectric and manufacturing method
WO1991019321A1 (en) * 1990-06-01 1991-12-12 Seiko Epson Corporation Method of manufacturing semiconductor device
WO1991019322A1 (en) * 1990-06-01 1991-12-12 Seiko Epson Corporation Method of manufacturing semiconductor device
WO1992002049A1 (en) * 1990-07-24 1992-02-06 Seiko Epson Corporation Semiconductor device
WO1992002048A1 (en) * 1990-07-24 1992-02-06 Seiko Epson Corporation Method of manufacturing semiconductor device
WO1992002050A1 (en) * 1990-07-24 1992-02-06 Seiko Epson Corporation Semiconductor device provided with ferroelectric material
US6940741B2 (en) 1990-08-03 2005-09-06 Hitachi, Ltd. Semiconductor memory device and methods of operation thereof
WO1992002955A1 (en) * 1990-08-07 1992-02-20 Seiko Epson Corporation Semiconductor device
US5343353A (en) * 1991-08-28 1994-08-30 Hitachi, Ltd. Semiconductor device and process of producing the same
US5384729A (en) * 1991-10-28 1995-01-24 Rohm Co., Ltd. Semiconductor storage device having ferroelectric film
EP1244144A1 (en) * 1999-12-14 2002-09-25 Matsushita Electric Industrial Co., Ltd. Nonvolatile memory and method of driving nonvolatile memory
EP1244144A4 (en) * 1999-12-14 2007-01-03 Matsushita Electric Ind Co Ltd Nonvolatile memory and method of driving nonvolatile memory

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