JPH01235358A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01235358A JPH01235358A JP6385188A JP6385188A JPH01235358A JP H01235358 A JPH01235358 A JP H01235358A JP 6385188 A JP6385188 A JP 6385188A JP 6385188 A JP6385188 A JP 6385188A JP H01235358 A JPH01235358 A JP H01235358A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- semiconductor chip
- lead part
- external electrode
- face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 239000011347 resin Substances 0.000 abstract description 12
- 229920005989 resin Polymers 0.000 abstract description 12
- 238000007789 sealing Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 3
- 238000005452 bending Methods 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に露出した面の放熱板を
有する樹脂封止型の半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a resin-sealed semiconductor device having a heat sink on an exposed surface.
従来、この糧の半導体装置は、外部１に極となるリード
フレームのリード部が、リードフレームのタブからアイ
ランドに向かう方向と同一方向に延びていて、第５図に
示すように、裏面が露出した電極を兼ねる放熱板１と、
放熱板１の上部に固着した図示しない半導体チップを覆
って放熱板１の上部に形成された封止樹脂２ａと、封止
樹脂２ａの放熱板１と直角をなす側面（リード部の延び
る方向の面）９ａからそのまま外部に引出されたリード
部の先端部の外部電極３ａとを含んで構成されていた。Conventionally, in this type of semiconductor device, the lead portion of the lead frame that serves as the pole on the outside 1 extends in the same direction as the tab of the lead frame toward the island, and the back surface is exposed as shown in FIG. a heat dissipation plate 1 which also serves as an electrode;
A sealing resin 2a is formed on the top of the heat sink 1 to cover a semiconductor chip (not shown) fixed to the top of the heat sink 1, and a side surface of the seal resin 2a that is perpendicular to the heat sink 1 (in the direction in which the lead portion extends) 9a and an external electrode 3a at the tip of the lead portion.
上述した従来の半導体装置は、裏面に露出して設置され
ている放熱板の面とは違う面である側面から外部電極が
導出されているので、表面実装の時に、リード部の延長
である外部を極を曲げ力ロエしなければならないという
欠点がある。In the conventional semiconductor device described above, external electrodes are led out from the side surface, which is a different surface from the surface of the heat sink that is installed exposed on the back surface. The disadvantage is that the poles must be bent with force.
本発明の半導体装置は、露出した面が電極を兼ねる放熱
板と、前記面と同一平面に設けられる外部を極とを有し
ている。The semiconductor device of the present invention includes a heat sink whose exposed surface also serves as an electrode, and an external pole provided on the same plane as the surface.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の第１の実施例の斜視図、第２図は第１
図の第１の実施例の断面図である。FIG. 1 is a perspective view of the first embodiment of the present invention, and FIG. 2 is a perspective view of the first embodiment of the present invention.
1 is a cross-sectional view of the first embodiment of the figure; FIG.
第１図及び第２図に示すように、裏面が露出した電極を
兼ねる表面に半導体チップ４を搭載した放熱板ｌと、放
熱板１の一端を固足する樹脂製のタイバー６と、一端が
タイバー６に固定されほぼ直角に折曲げられ放熱板ｌの
面と同一面で他端が外部に露出される複数の外部を極３
と、放熱板１の表面を覆い半導体チップ４とタイバー６
と外部１！極３の外周を包んで形成される封止樹脂２と
を含む。なお、半導体チップ４の電極パッドと対厄する
外部電極３の半導体チップ内リード部とはポンディング
ワイヤ５で接続されている。As shown in FIGS. 1 and 2, there is a heat sink 1 with a semiconductor chip 4 mounted on the surface which also serves as an electrode with the back side exposed, a resin tie bar 6 that secures one end of the heat sink 1, and a tie bar 6 made of resin that holds one end of the heat sink 1. A plurality of external parts fixed to the tie bar 6 and bent at almost right angles, the other end of which is exposed to the outside on the same surface as the heat sink l, are connected to the pole 3.
, covering the surface of the heat sink 1 with the semiconductor chip 4 and the tie bar 6.
And external 1! and a sealing resin 2 formed to surround the outer periphery of the pole 3. Note that the electrode pads of the semiconductor chip 4 and the internal lead portions of the external electrodes 3 in the semiconductor chip are connected by bonding wires 5.
第３図は第１図の実施例に用いるリードフレームの平面
図である。FIG. 3 is a plan view of the lead frame used in the embodiment of FIG. 1.
第２図及び第３図に示すように、放熱板１と外部電極３
は同一面に設けられる。この形状にするために、外部電
極３の半導体チップ内リード部は樹脂製のタイバー６に
よ、シ放熱板ｌと同一面に固定され、タブからアイラン
ドに向う方向Ａに垂直な方向Ｂへほぼ直角に折曲げられ
て延びている。As shown in FIGS. 2 and 3, a heat sink 1 and an external electrode 3
are provided on the same surface. In order to achieve this shape, the lead part of the external electrode 3 inside the semiconductor chip is fixed to the same surface as the heat sink l by a resin tie bar 6, and is moved in the direction B perpendicular to the direction A from the tab to the island. It extends and is bent at a right angle.
しかし、外部電極３の半導体チップ内リード部はタブか
らアイランドに向う方向Ａに延びているが、タイバー６
から完全切断することにより、半導体チップ内リード部
の廷びる方向の封止樹脂２の側面９は電気的に絶縁され
る。However, although the lead portion of the external electrode 3 inside the semiconductor chip extends in the direction A from the tab toward the island, the tie bar 3
By completely cutting away from the semiconductor chip, the side surface 9 of the sealing resin 2 in the direction in which the lead portion inside the semiconductor chip extends is electrically insulated.
第４図は本発明の第２の実施例の斜視図である。FIG. 4 is a perspective view of a second embodiment of the invention.
第４図に示すように、第２の実施例では外部電極３ｂの
先端を封止樹脂２の面から突出させている。このように
突起状の外部を極３ｂとすることにより、基板実装時に
基板のスルーホールに固定できる利点がある。As shown in FIG. 4, in the second embodiment, the tips of the external electrodes 3b are made to protrude from the surface of the sealing resin 2. As shown in FIG. By forming the outside of the protrusion as the pole 3b in this way, there is an advantage that it can be fixed to the through hole of the board during mounting on the board.
以上説明したように本発明は、放熱板と同一面に外部電
極を設けることによシ、表面実装時、リード部の曲げ加
工の工程を削減できる効果がある。As described above, the present invention has the effect of reducing the bending process of the lead portion during surface mounting by providing the external electrode on the same surface as the heat sink.
又、樹脂によるタイバーに一端を固足することにより、
リード部の延びる方向の側面が電気的に絶縁できる効果
がある。Also, by fixing one end to a resin tie bar,
This has the effect of electrically insulating the side surfaces in the direction in which the lead portion extends.
第１因は本発明の第１の実施例の斜視図、第２図は第１
図の第１の実施例の断面１凶、第３図は講１図の第１の
実施例に用いるリードフレームの平面図、第４図は本発
明の第２の実施例の斜視図、第５図は従来の半導体装置
の一例の斜視図である。
ｌ・・・・・・放熱板、２，２ａ・・・・・・封止樹脂
、３．３ａ。
３ｂ・・・・・・外部電極、４・・・・・・半導体チッ
プ、５・・・・・・ポンディングワイヤ、６・・・・・
・タイバ ％９ｔ９ａ・・・・・・側面。
代理人 弁理士 内 原 音
光 １ 閃
鴬２図
高 Ｊ （２）The first factor is a perspective view of the first embodiment of the present invention, and FIG.
3 is a plan view of the lead frame used in the first embodiment of the present invention, and FIG. 4 is a perspective view of the second embodiment of the present invention. FIG. 5 is a perspective view of an example of a conventional semiconductor device. l... Heat sink, 2, 2a... Sealing resin, 3.3a. 3b... External electrode, 4... Semiconductor chip, 5... Bonding wire, 6...
・Taiba %9t9a... Side. Agent Patent Attorney Otomi Uchihara 1 Senho 2 Zutaka J (2)
Claims (1)
面に設けられる外部電極とを有することを特徴とする半
導体装置。A semiconductor device comprising: a heat sink whose exposed surface also serves as an electrode; and an external electrode provided on the same plane as the surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6385188A JPH01235358A (en) | 1988-03-16 | 1988-03-16 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6385188A JPH01235358A (en) | 1988-03-16 | 1988-03-16 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01235358A true JPH01235358A (en) | 1989-09-20 |
Family
ID=13241247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6385188A Pending JPH01235358A (en) | 1988-03-16 | 1988-03-16 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01235358A (en) |
-
1988
- 1988-03-16 JP JP6385188A patent/JPH01235358A/en active Pending
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