JPH012331A - Manufacturing method of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and particularly to the mounting of multi-electrode, narrow-width I and Sl chips in microcomputers and gate arrays.

Conventional technology The conventional technique will be explained with reference to FIG.

First, as shown in FIG. 3a, connecting resin 13 is applied to the surface of wiring board 14 made of ceramic, glass, etc., on which conductor wiring 15 is provided. The conductor wiring 15 is made of Cr-Au, Ae
, ITO, etc., and the connecting resin 13 is thermosetting or ultraviolet curing epoxy.

Acrylic etc. Dispensing, printing, stamping, etc. are used to apply the connecting resin 13, but since the amount applied is very small, it is difficult to control and there is large variation.

Next, as shown in FIG. 3, the LSI chip 11' having the electrodes 12 made of Ae, Au, etc. was coated with the connecting resin 13 of the wiring board 14 so that the electrodes 12 and the conductor wiring 15 were aligned. Place the LSI chip 1 in the area and press the pressure tool 16.
1' is pressurized. At this time, the connecting resin 13 is pushed out to the periphery, and the electrodes 12 of the LSI chip 11' and the conductive wiring 15 are brought into electrical contact. At this time, if the coating amount of the connection resin 13 is poorly controlled and increases, the L
The connecting resin 13 protruding around the SI chip 11' is
It reaches the pressure tool 16, and when the pressure tool 16 is released later, it becomes defective and the yield decreases. Next, the connecting resin 13 is cured with the pressure tool 16 pressurizing the LSI chip 11', and the pressure tool 16 is released as shown in FIG. 3C. At this time, the LSI chip 11° is connected to the wiring board 14
At the same time, the electrodes 12 of the LSI chip 11' and the conductor wiring 15 are electrically connected by contact.

When the wiring board 14 is a transparent substrate such as glass, the connection resin 13 is cured by ultraviolet rays, and when a thermosetting connection resin 13 is used, the pressure tool 16 is provided with a heating mechanism and cured by heating.

Problems to be Solved by the Invention The above-mentioned conventional technology uses a method of applying liquid resin to the wiring board as a method of forming the connection resin, and therefore has the following problems.

1) Since the amount of resin applied is very small, it is difficult to control, and as a result, if the amount of resin applied is large, a large amount protrudes around the LSI chip and adheres to the pressure tool, resulting in a decrease in yield.

2) If there is a large amount of resin around the LSI chip,
Thermal stress in the connecting resin around the SI chip increases, resulting in poor thermal shock resistance and low reliability.

3) If the amount of coating is small, the connection resin will not be formed on the entire surface of the LSI chip, resulting in poor connection.

4) When mounting a plurality of LSI chips on the same board, if there is a large amount of resin protruding around the LSI chips, it is necessary to increase the distance between adjacent chips, resulting in a reduction in packaging density.

5) Printing is a method for achieving relatively high precision in the amount of coating, but the range of application is narrow due to restrictions on the viscosity of the resin.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention forms a connecting resin on a semiconductor wafer using a spin cord, then divides it into LSI chips, and conducts wiring using the connecting resin on the LSI chip. It is fixed and connected to the board.

Function: Since the connecting resin is formed using a method of spin-coding the semiconductor wafer, the amount of connecting resin can be controlled with great precision.
control, yield and reliability are improved.

Example An embodiment of the present invention will be described with reference to FIGS. 1 and 2.

First, as shown in FIGS. 1a and 1b, connecting resin 3 is coated on the surface of semiconductor wafer 1 having electrodes 2 using a spinner or the like. The electrode 2 is made of Au, Ae, etc. and has a thickness of 0.5
It is about ~10μ. The connecting resin 3 is a thermosetting, ultraviolet curing, or thermofusible resin, and in the case of thermosetting or ultraviolet curing, it is epoxy, acrylic, etc., and in the case of thermofusible, polyurethane or FEP is used. After coating, in the case of heat curing, only the solvent is evaporated to the B stage, and in the case of ultraviolet curing, it is in the blivator state. If the material is thermoplastic, heat treatment is performed using a dispersion liquid. The thickness of the connecting resin 3 is about 1 to 15 μm. When electrode 2 is Ae,
In order to prevent an increase in contact resistance due to the At oxide film when connecting to the next wiring board, immediately after removing the At oxide film by dry etching, etc., apply the connection resin 3 on the electrode 2 which has an intrinsic Ae surface. do. The connection resin 3 can prevent the formation of an oxide film on the Ae surface of the electrode 2. Next, as shown in FIG.
Obtain SI depth 1'. Next, as shown in Figure 2a, C
r A u + The LSI chip 1' is placed on the wiring board 4 by aligning the conductor wiring 5 and the electrode 2 of the wiring board 4 having the conductor wiring 5 made of ITo, Cu, or the like. The wiring board 4 is made of ceramic, glass, polyimide, etc., and has a thickness of about 0.1 to 2.0 m.

Next, as shown in Figure 2, press the LSI chip 1 with the pressure tool 6.
′ is pressurized. At this time, if the connecting resin 3 is thermosetting or thermoplastic, a heating mechanism is provided in the pressure tool 6, and the LS
The I-chip 1' is heated to temporarily melt the connection resin. In addition, in the case of ultraviolet curing, pressure is applied at room temperature. At this time, L
The connecting resin 3 on the electrode 2 of the SI chip 1' is pushed out to the periphery, and the electrode 2 and the conductor wiring 5 are brought into electrical contact. At this time, since the amount of connection resin 3 is controlled with precision, there will be no adhesion to the pressurizing tool or connection failures due to insufficient supply, unlike in the past.

Next, the connection resin is cured while the LSI chip 1' is pressurized with the pressure tool 6, and then, as shown in FIG. 2C, the pressure tool 6 is released and the LSI chip 1' is attached to the wiring board. 4, and electrically connects the electrode 2 of the LSI chip 1' to the conductor wiring 5. The connection resin 3 is cured by heating in the case of heat curing or thermofusible, and in the case of ultraviolet curing, the wiring board 4 is made of a transparent material and is irradiated with ultraviolet rays. In either case, curing is completed in about 1 to 5 seconds.

Effects of the Invention As described above, in the present invention, since the connecting resin is formed on the semiconductor wafer before being divided, there are the following effects.

1) Since there is no process of applying connection resin to the wiring board when mounting the LSI chip, the mounting cost is low.

2) Since the precision of the connection resin can be controlled, there is no possibility of adhesion to the pressurizing tool or connection failures due to lack of resin, unlike in the past (yield is high).

3) Since protrusion around the LSI chip can be minimized, thermal shock resistance is improved and reliability is high.

4) In the case of multi-chip, the distance between adjacent chips can be made very narrow, resulting in high packaging density.

5) When the electrodes of the LSI chip are Ae, the negative Ae surface is maintained by the connecting resin, resulting in very low contact resistance, making it possible to use a normal LSI chip that does not require surface treatment of the electrodes. can.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of the process of applying bonding resin to a semiconductor wafer in one embodiment of the present invention, Fig. 2 is a cross-sectional view of the same chip mounting process, and Fig. 3 is a conventional mounting technique. FIG. l...Semiconductor wafer, 1'...LS
I chip, 2... Electrode, 3... Connection resin, 4... Wiring board, 5... Conductor wiring, 6... Processing. pressure tools. Name of agent: Patent attorney Toshio Nakao and one other person Figure 3 I3...1! Ic is in ruins

Claims (1)

[Claims] a step of applying an insulating resin to a surface having electrodes of a wafer on which semiconductor elements are formed, a step of dividing the wafer into semiconductor element units, and an electrode of the conductor wiring and the semiconductor element of an insulating substrate having conductor wiring. a step of pressing the semiconductor element against the insulating substrate and bringing the conductor wiring into contact with the electrode of the semiconductor element; curing the insulating resin and fixing the semiconductor element to the insulating substrate; A method for manufacturing a semiconductor device, comprising the step of electrically connecting a conductor wiring and an electrode of the semiconductor element.