JPH01207848A - Storage device - Google Patents

Abstract

PURPOSE:To minimize a basic storage capacity and an extension unit by making twice accesses or more respectively over plural storage elements. CONSTITUTION:A storage element 2 is constituted as (n) word X one bit and twice accesses are made to each one storage element. When a data access unit is made as 4 bytes, the basic storage capacity and the extension capacity to attain a block transfer to 16 bytes are made into 8 mega bytes and turns to 1/2.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a storage device for an information processing device.

[Conventional technology]

Conventionally, in this type of storage device, the operation of the storage element was relatively simple, so in order to write or read multiple data with one command and address, so-called block transfer, it was necessary to use the method shown in Figure 3. I adopted a configuration like this.

In Figure 3, for example, the data access unit is 4 bytes (
However, assuming that a byte is 8 bits), in order to enable block transfer of up to 16 bytes, if the word direction is now per storage element, that is, n or LM (mega) words, the basic capacity and expansion The capacity will be 16 megabytes. Note that in this case, the memory element has an n-word×1-bit configuration.

In the case of the configuration shown in FIG. 3, for example, 16-byte data is read out in the order of bO→b1→b2→b3, corresponding to FIG. These are sequentially selected by the selection circuit 21, and
Read data line 26 which is an interface with other devices
Output to. This situation is shown in FIG.

[Problem to be solved by the invention]

As shown in FIG. 3, the conventional storage device described above has a one-to-one correspondence between the data access unit and the storage element, so it has the disadvantage that the basic storage capacity and the expansion capacity are large.

[Means to solve the problem]

The storage device of the present invention is a storage device that can only write or read multiple pieces of data with one command and address, and can transfer multiple pieces of data by accessing each of the multiple storage elements two or more times. It is characterized by

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In this case as well, the memory element has an n word×1 bit configuration. FIG. 2 is a timing chart showing the same 16-byte block (read) transfer as in the conventional example.

In the case of the timing chart of FIG. 2, the difference from the conventional example is that when one memory element is focused on, it is accessed twice. This access method can be realized using a well-known technique by accessing in an operation mode called a fast access cycle, such as nibble mode, page mode, static column mode, or the like.

In order to make this access method possible, by configuring the data access unit as shown in Figure 1, the basic storage capacity and expansion capacity can be reduced by configuring one memory element with n words x 1 hit and n being the same as in the conventional example. For 1 megaword, if the data access unit is 4 bytes, it will be 8 mechabytes to enable block transfer of up to 16 bytes.
This is 1/2 of the conventional example.

〔Effect of the invention〕

As described above, the present invention has the effect of reducing the basic storage capacity and the expansion unit by accessing each of a plurality of storage elements two or more times during block transfer.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing one embodiment of the present invention, and FIG.
FIG. 3 is a configuration diagram showing a conventional example, and FIG. 4 is a timing chart showing the operation of FIG. 3. 11... Selection circuit, 12... bo, b2 read data, 13... bl, b3 read data, 14...
・Read data line, 31... selection circuit, 32...
b. Read data, 33...bl read data, 34
...b2 read data, 35...b3 read data, 36...read data line.

Claims (1)

[Claims] A memory device capable of writing or reading multiple pieces of data with one command and address, which is characterized by making it possible to transfer multiple pieces of data by accessing each of the multiple memory elements two or more times. Device.