JPH01205439A - Element isolation - Google Patents

Abstract

PURPOSE:To enable an insulating film to be formed such that it is thicker in a region other than an element forming region, namely in the field region than in the element forming region, by recessing the insulating film on the element forming region such that the level thereof is lower than that of a resist when the insulating film is etched to expose the element forming region. CONSTITUTION:In order to provide an island 1a as an element forming region on a single-crystal Si substrate 1, the surface of the substrate is masked with a resist 2 and a recess 16 is formed by the reactive ion etching. Then an SiO2 film 3 is deposited by the CVD process so that the recess 16 is filled therewith and a field oxide film (insulating film) is thereby provided on the island 1a. A resist 4 is then applied so as to flatten difference in level on the surface. The structure is then etched back by an etching technique capable of etching the SiO2 film and the resist 4 at approximately equal rates, until the SiO2 film 3 on the island 1a is exposed. The SiO2 film 3 is further wet etched with buffered hydrofluoric acid so as to be recessed more than the resist 4. The etching process capable of etching the SiO2 film 3 and the resist 4 at approximately equal rates is again performed so that the SiO2 film on the island 1a is thinner than the SiO2 film in the field section of the recess 1b. Finally, the structure is wet etched with hydrofluoric acid so that the surface of the island 1a is exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION A) Industrial Application Field A' The invention relates to a method for separating semiconductor elements in a semiconductor integrated circuit device.

2. Description of the Related Art In semiconductor integrated circuit devices, it is necessary to electrically isolate each element formed on a silicon (Sl) substrate. One of the element isolation technologies is element isolation using insulators, and LOGO5: Local Oxidation
The n of 5 ilicon> method is one typical method.

In the LOCOS method, a silicon nitride (SiN) film is used to control the region where a thick silicon oxide (SiO2) film is formed, but since an oxide layer called a birth beak is formed at the edge of the SiN film, the SiN film is used as a mask. The area in which elements can actually be formed becomes smaller than the area in which the elements can be formed.

This birth beak was a factor that hindered high integration.

In order to suppress the occurrence of bird's beaks, for example, ``IEEE
TRANSACTIONS ON ELECTRON
DEVICES, VolED-29, No. 4,
APRIL 1982 J m 536-53
On page 9, the field oxide film formation area is made concave, the top and side surfaces of the convex element formation area are covered with a SiN film, and then a 5I02 film is formed, so that the -2=5i02 film is the same as the substrate. The SiN film, the convex portion, and a part of the SiO2 film are etched to form a SiO2 film for element isolation.

C) Problems to be solved by the invention However, the above method requires many steps, and -
Since the SiO2 film formed at the same time is etched, there is a risk that the film thickness will decrease and the insulation properties will deteriorate.

The present invention has been made with these points in mind, and is intended to perform element isolation using a sufficiently thick insulating film through a relatively simple process.

2) Means for Solving the Problems The present invention includes a step of forming a recess for forming an insulating film that separates an element formation region of a substrate, filling the four parts, and further forming an insulating film on the element formation region. a step of applying a resist on the insulating film to planarize its surface; and a step of etching the insulating film and the resist at approximately the same etching rate to expose the insulating film on the element formation region. and,
a step of etching the exposed insulating film portion to make it recessed from the resist; a step of etching the insulating film and the resist at approximately the same etching rate; and a step of etching the insulating film to expose the element formation region. This is an element isolation method comprising:

e) In the process of etching the active insulating film to expose the element forming area, by recessing the insulating film part over the element forming area by more than 100 m, the insulating film part other than over the element forming area, that is, in the field area, is etched. It becomes possible to form it thickly.

f) Example FIGS. 1A to 1G are process explanatory diagrams of the method of the present invention.

Ru. However, in the preferred embodiment, the doping process for the header, etc. for device fabrication is omitted.

In order to form an island/domain (1a) as an element formation region on a single crystal 81 substrate (1), the portion that will become the island is masked with a resist (2), and the four parts (1b) on which a field oxide film will be formed are masked with a resist (2). ) to reactive io/Yupping (RI
E: Reactive Ion Etching (Fig. 1A). The etching depth of the recess (1b) at this time is 0.6+rm.

8102 film (3) as a field oxide film (insulator) on the island (1a) while filling with the fourth part (1b)
13 layers of the same are deposited by the CVD method (FIG. B). The 5102 film (3) also has a convex shape on the convex island (1a), and in order to flatten this level difference, a resist (4) is applied.
) (for example, "OMRJ" manufactured by Tokyo Ohka) at 500 Or, p
, m for 30 seconds and bake at 140°C for 30 minutes to obtain a flat surface (C in the same figure).

Next, by an etching method in which the etching rate of the SiO2 film (3) and the [-inst (4) are approximately equal, for example, ion beam etching using Ar ions, J-touchback is performed until the SiO2 film (3) on the island (1a) is exposed. do(
Figure D). At this time, SiO2 film (3>) and resist (4)
), the etching speed continues while the flat surface is maintained. Also, there is no ion beam etching 1' as an etching method;
The same holds true even when etching is performed by RIE under conditions where the etching rates of the 5102 film (3) and the resist (4) are approximately equal.

When all of the 5102 film (3) on the island (1a) is exposed, the exposed 5102 film (3) is removed using buffered hydrofluoric acid.
Cut the membrane 3) Cut the part, and then cut it.
4) Make it more concave (E in the same figure). Then, the Si on the island (1a) is etched again using an etching method (ion beam etching) in which the aforementioned 5IO2 film 3) and the resist (4) have approximately the same etching speed.
The O2 film is made thinner than the SiO2 film in the field portion of the recess (1b) (FIG. F). Tosoting is finished before all of the resist (4) is removed and the surface of the island (1a) is exposed.

Finally, the surface of the island (1a) is exposed by wet etching with buffered hydrofluoric acid (G in the same figure). At this time, the surface of the island (1a) is completely exposed by slightly over-etching, but the surface of the island (1a) is
Since the SiO2 film in the recess (1b) is thicker than the 8102 film above, the 5iOz film as the field oxide film does not become thinner. Thus, a thick field oxide film is formed with a predetermined island secured, and elements are isolated.

g) Effects of the Invention As is clear from the above description, in the present invention, the oxide film on the island is thinner than the oxide film in the no-yield area and has a concave shape, so that when the island surface is exposed and element isolation is performed, In addition, the oxide film in the field portion does not become thinner, but becomes thicker, and good insulating properties can be obtained. Furthermore, element isolation is performed in a desired pattern, contributing to miniaturization and high integration.

In addition, the surface after element separation is flat, and the post-process
No inconvenient step difference occurs in the formation of the special C wiring, and post-processing can be easily performed.

In addition, by stopping the ion beam etching before exposing the islands and finally exposing the islands by uniform etching, the ion beam
Damage to the country due to environmental damage can be avoided.

[Brief explanation of the drawing]

FIGS. 4 to 4G are process explanatory diagrams of the zero invention method. (1)...Single crystal Si substrate (1a)...Island (element formation area) (1b)...Concave portion (3)...
5102 film (4)...resist

Claims (1)

[Claims] (1) A step of forming a recess for forming an insulating film that separates an element formation region on a substrate, a step of filling the recess and further forming an insulating film on the element formation region, and a step of forming a resist on the insulating film. a step of coating the insulating film to planarize its surface; a step of etching the insulating film and the resist at approximately the same etching rate to expose the insulating film on the element formation region; and a step of etching the exposed insulating film portion to planarize the surface. An element isolation method comprising the steps of recessing the resist, etching the insulating film and the resist at approximately the same etching rate, and etching the insulating film to expose the element forming region. .