JPH01198878A - Memory for picture - Google Patents

Abstract

PURPOSE:To easily invert the right and left of a video signal by making serial data writable to a data register for input from an arbitrary direction out of right and left directions. CONSTITUTION:When an R/L selecting signal is 'R', a selector switch 14 is connected to an (a) side, and the R/L selecting signal 'R,' which is for shifting the serial data in the right direction, is impressed to a shift directional control signal input terminal 4c. Consequently, the serial data impressed to a left side input terminal 4a of a data register 4 for input are written while the data are shifted from the left to the right. When the R/L selecting signal is 'L', the selector switch 14 is connected to a (b) side, and the serial data impressed to a right side input terminal 4b of the data register 4 for input are written while the data are shifted from the right to the left. Thus, the video signal, in which its right and left are inverted, can be obtained.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to an image memory, and more specifically, the present invention relates to an image memory, and more specifically, the present invention relates to an image memory, and more specifically, it multiplies digitally converted video signals, then digitally processes them by reading them, and reproduces and displays them. The invention relates to image memory that is applied to electronic devices such as electronic devices.

<Summary of the Invention> The present invention is an image memory having input/output terminals for full data. By making it possible to read the serial data from the data register 6 from any left or right direction, it is possible to easily perform left-right inversion of the video signal.

<Prior Art> Conventionally, image memory used for reproducing and displaying still images, etc. in television receivers and magnetic recording/reproducing devices simply stores image data for one field.
Its main purpose was to output. Therefore, the configuration of the image memory is to store data in M
The so-called FIFO (
77 - strike in, first out) configuration was sufficient.

A block diagram of the conventional image memory mentioned above is shown in FIG. 3. The configuration and operation of the conventional image memory will be explained with reference to FIG.

To input data from the serial data input terminal 10 to the input data register 4, first, a write start column address is set in the input address pointer 3 by a column address setting command of the column address decoder 2.
By inputting 5ICK (serial in clock) from the 5ICK input terminal 12 to the input data register 4, the serial data is transferred to the address area of the input data register 4 specified by the contents of the input address pointer 3. The serial data of the input terminal 10 is written through the serial data input capacitor 7a 8 while being shifted from left to right. When writing of data to the input data recorder 4 for one line is completed, the row address is Decoder 1
The data is sequentially transferred from the right side of the input data register 4 to the row address area of the X row Y column memory array 5 specified by . By sequentially performing the above operations while incrementing the row address, image data for one field is stored in the memory array 5 in X rows and Y columns.

The data stored in the X row Y column memory 7 array 5 is transferred by specifying one row of data to be transferred using the row address decoder 1, and the specified one row of data is transferred to the X row Y column memory array 5. The output data is sequentially transferred to the output data register 6 in the following order.

In order to output the data transferred to the output data register 6 to the serial data output terminal, first, a read start column address is set in the output address pointer 7 by a column address setting command of the column address decoder 2. Next, set 5OCK (serial out clock) to
By inputting from the 5OCK input terminal 13 to the output data register 6, the serial data in the address area of the output data reno star 6 specified by the contents of the output address pointer 7 is sequentially input from right to left. The data is output to the serial data output terminal 11 via the output buffer 7.

<Problems to be Solved by the Invention> However, in the above-mentioned image memory, the direction of input and output of serial data is always the same, so it is difficult to use it for purposes of obtaining a video signal for horizontally reversing an image. Couldn't use it.

<Means for Solving the Problems> The present invention makes it possible to write serial data into the input data register 4 from any left or right direction, or read serial data from the output data register 6 from any left or right direction. This is what I did.

As a result, the digitally converted video signal can be serially written line by line into the input data register 4 from left and right opposite directions, or the video signal can be written line by line from the output data register 6. By reading from the opposite left and right directions, a horizontally inverted video signal can be obtained.

<Example> Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

Figure #1 is a block diagram of an embodiment of the image memory of the present invention. ! Figure n2 is a block diagram of another embodiment of the image memory of the present invention. In these figures, the same reference numerals are given to the components corresponding to the conventional example shown in FIG. Since it is exactly the same as the example, the explanation will be omitted. Here, only the method of writing serial data into the input data register 4 of the present invention from any left or right direction and the circuit operation will be described.

In this embodiment, the serial data input to the serial data input terminal 10 is applied to the selector switch 14 via the serial data input buffer 8, while the serial data input to the input data register 4 is shifted. The R/L select signal for specifying the direction is
The configuration is such that the L select signal is input to the input terminal 1-6.

If the R/L select signal is R'', the selector switch 14 is connected to the a side, and the serial data is applied to the left input terminal 4a of the input data register 4.

On the other hand, an R/L select signal "'R" for shifting the shift direction control signal input terminal 4c of the input data register 4 to the right is applied.
As a result, the left input terminal 4 of the input data reno star 4
The serial data applied to a is written while being shifted from left to right. When the writing of serial data to the input data register 4 for one row is completed, the data is sequentially transferred to the memory array 5 in X rows and Y columns starting from the data on the right side.
The data is stored line by line in the order in which it was transferred.
The serial data output terminal 10 is then connected via the output data recorder 6 and the serial data output buffer 9.
Serial data output terminal 11 in the same order as input.
Output to.

Next, if the R/L select signal is "L", the selector switch 14 is connected to the b side, and the serial data is applied to the right input terminal 4b of the input data register 4. On the other hand, the input data An R/L select signal "L" for shifting the serial data to the left is applied to the shift direction control signal input terminal 4C of the register 4, and as a result, the right input terminal 4b of the input data register 4
Serial data applied to is written while shifting from right to left. One line input data register 4
When the writing of serial data to the serial data register 6 is completed, the data is sequentially transferred from the right side to the memory array 5 in X rows and Y columns, and the data is accumulated row by row in the order of transfer, and then the data is transferred to the output data register 6 and the serial The data is output to the serial data output terminal 11 via the data output buffer 9. In other words, the sequential relationship of each row of output serial data is inverted from that input to the serial data input terminal 10.

Next, another embodiment of the present invention is shown in FIG.

In this embodiment, in order to obtain the same effect as the above-mentioned embodiment,
The reading direction of the output data register 6 can be freely left or right. The operation is performed by the output data register 6 instead of the input data register 4 in the former embodiment, and a description of the operation will be omitted.

<Effects of the Invention> As is clear from the above detailed explanation, in the image memory of the present invention, serial data can be written to the input data register from any left or right direction, or from the output data register. By making it possible to read out the serial data from any left or right direction, it is possible to easily perform horizontal inversion of the video signal. It has become possible to easily realize a television receiver for images.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the image memory of the present invention, FIG. 2 is a block diagram of another embodiment of the image memory of the present invention, and FIG. 3 is a block diagram of a conventional image memory. be. 1... Row address decoder, 2... Column address decoder, 3... Input address pointer, 4... Input data register, 4a... Left input terminal, 4b...
Right side input terminal, 4c... Shift direction control signal input terminal, 5... X row and Y column memory array, 6... Data reno star for output, 6a... Left side output terminal, 6b... Right side 8 power terminal, 6c...shift direction control signal input terminal, 7
...Output address pointer, 8...Serial data input buffer 7T19...Serial data output buffer 7,
10... Serial data input terminal, 11... Serial data output terminal, 12... 5ICK input terminal, 13
...5OCK input terminal, 14...Input select switch, 15...Output select switch, 16.17.
・・R/L select signal input terminal

Claims (1)

[Claims] 1. An image memory having an input/output terminal for serial data, characterized in that serial data can be written into the input data register (4) from any left or right direction. Memory for. 2. An image memory having an input/output terminal for serial data, characterized in that the serial data from the output data register (6) can be read out from any left or right direction.