JPH01187845A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01187845A JPH01187845A JP63011903A JP1190388A JPH01187845A JP H01187845 A JPH01187845 A JP H01187845A JP 63011903 A JP63011903 A JP 63011903A JP 1190388 A JP1190388 A JP 1190388A JP H01187845 A JPH01187845 A JP H01187845A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- resin
- tape
- semiconductor chip
- molding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000011347 resin Substances 0.000 claims abstract description 20
- 229920005989 resin Polymers 0.000 claims abstract description 20
- 238000000465 moulding Methods 0.000 abstract description 7
- 239000012212 insulator Substances 0.000 abstract description 2
- 229910001111 Fine metal Inorganic materials 0.000 abstract 1
- 239000011810 insulating material Substances 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 238000007789 sealing Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、モールドパッケージによる半導体装置に関し
、特にリード端子を多く持つ半導体装置のリードフレー
ムに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device using a mold package, and particularly to a lead frame of a semiconductor device having many lead terminals.
従来、第３図に示すようにこの種のリードフレーム９は
、各リード端子８を端子と一体化しているタイバー１０
で固定しているため、半導体チップをパッケージ内に封
入した後に各端子を分離するためにタイバー１０をカッ
トする必要がある。Conventionally, as shown in FIG. 3, this type of lead frame 9 has a tie bar 10 that integrates each lead terminal 8 with the terminal.
Therefore, it is necessary to cut the tie bars 10 in order to separate each terminal after the semiconductor chip is encapsulated in the package.
上述した従来のリードフレームは、端子間がタイバーで
固定され連結されているので、半導体チップをパッケー
ジ内に封入した後にタイバーを切断しなければならない
という欠点がある。The conventional lead frame described above has a disadvantage in that the terminals are fixed and connected by tie bars, and the tie bars must be cut after the semiconductor chip is encapsulated in the package.
上述した従来のリードフレームに対し、本発明に用いる
リードフレーム端子間をテープまたは樹脂で固定するこ
とによって、半導体チップをパッケージに封入した後に
各々の端子を分離させる必要がないという相違点を有す
る。The present invention differs from the conventional lead frame described above in that the lead frame terminals used in the present invention are fixed with tape or resin, so there is no need to separate each terminal after the semiconductor chip is encapsulated in a package.
本発明の半導体装置は、半導体チップを樹脂パッケージ
内に封入した後、タイバーをカットせずに各々の端子を
分離させるために、絶縁テープまたは樹脂でリード端子
間を固定する構造を有している。すなわち、従来の金属
タイバーに代って絶縁性かつ耐熱性の物体をもってタイ
バーとしている。これは従来の金属タイバーと同様に樹
脂の流れ出し防止の役目も行う。又、リード端子の相互
の支持も行う。そして絶縁体のタイバーであるから樹脂
モールド後に切断除去する必要がない。The semiconductor device of the present invention has a structure in which after a semiconductor chip is encapsulated in a resin package, the lead terminals are fixed with insulating tape or resin in order to separate each terminal without cutting the tie bar. . That is, in place of the conventional metal tie bar, an insulating and heat resistant object is used as the tie bar. Like conventional metal tie bars, these also serve to prevent resin from flowing out. It also provides mutual support for the lead terminals. And since it is an insulating tie bar, there is no need to cut and remove it after resin molding.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は、本発明の実施例のリードフレームを用いた半
導体装置の上面図であり、第２図は第１図のＡ−Ａ’部
の断面図である。１はリードフレーム本体であり、真中
に半導体チップ６を乗せる部分（半導体素子搭載部）５
を有し、その回りに放射状に伸びる入出力端子をリード
系のり−ド２を有している。各リード２の先端と半導体
チップ６の電極とを金属細線７でポンディング接続する
。次に樹脂モールド２１を行い封入する。第１図で樹脂
モールド２１の外壁を２点鎖線２０で示す。各リード°
２は耐熱性の絶縁テープ４で相互に連結する。このテー
プ４によりリード２の不所望の変形は阻止されると同時
にこのテープ４はモールド樹脂の流れ出し防止の役目を
行う。このチーし
プ４は絶縁体であるから樹脂モールド後にリード２の間
において切断除去する必要はない。リード配列の外側部
２２のみ切断すればよい。FIG. 1 is a top view of a semiconductor device using a lead frame according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along line AA' in FIG. Reference numeral 1 denotes a lead frame main body, and a part (semiconductor element mounting part) 5 in which a semiconductor chip 6 is placed in the middle.
It has a lead system glue 2 with input/output terminals extending radially around it. The tip of each lead 2 and the electrode of the semiconductor chip 6 are connected by bonding using a thin metal wire 7. Next, a resin mold 21 is formed and sealed. In FIG. 1, the outer wall of the resin mold 21 is indicated by a two-dot chain line 20. Each lead °
2 are interconnected with a heat-resistant insulating tape 4. This tape 4 prevents undesired deformation of the lead 2, and at the same time serves to prevent mold resin from flowing out. Since this chip 4 is an insulator, there is no need to cut and remove it between the leads 2 after resin molding. It is only necessary to cut the outer portion 22 of the lead array.
以上説明したように本発明は、端子間をテープまたは樹
脂で固定することにより、半導体チップをパッケージ内
に封入した後に各々の端子を分離させる必要がないとい
う効果がある。As explained above, the present invention has the advantage that by fixing the terminals with tape or resin, there is no need to separate the terminals after the semiconductor chip is encapsulated in the package.
第１図は本発明の一実施例を示す上面図、第２図は第１
図のＡ−Ａ’部の断面図である。第３図は従来のリード
フレームの上面図である。
１．９はリードフレーム本体、４は耐熱性テープ、２，
８はリード端子、５は半導体チップ搭載部、６は半導体
チップ、７は金属細線、２０は樹脂モールドの外壁、２
１は樹脂モールド、２２は切断部である。
代理人 弁理士 内 原 晋FIG. 1 is a top view showing one embodiment of the present invention, and FIG. 2 is a top view showing one embodiment of the present invention.
It is a sectional view of the AA' part of a figure. FIG. 3 is a top view of a conventional lead frame. 1.9 is the lead frame body, 4 is the heat-resistant tape, 2,
8 is a lead terminal, 5 is a semiconductor chip mounting part, 6 is a semiconductor chip, 7 is a thin metal wire, 20 is an outer wall of a resin mold, 2
1 is a resin mold, and 22 is a cutting section. Agent Patent Attorney Susumu Uchihara
Claims (1)
、樹脂モールドし、該樹脂モールドの外壁より複数のリ
ードが導出する半導体装置において、前記樹脂モールド
の外壁の近くでかつ該樹脂モールドの外側において複数
のリードをたがいに連絡する絶縁性物体を具備したこと
を特徴とする半導体装置。In a semiconductor device in which a semiconductor chip is mounted on an element mounting portion of a lead frame and molded with resin, and a plurality of leads are led out from an outer wall of the resin mold, a plurality of leads are formed near the outer wall of the resin mold and outside the resin mold. A semiconductor device characterized by comprising an insulating object that connects leads to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63011903A JPH01187845A (en) | 1988-01-21 | 1988-01-21 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63011903A JPH01187845A (en) | 1988-01-21 | 1988-01-21 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01187845A true JPH01187845A (en) | 1989-07-27 |
Family
ID=11790689
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63011903A Pending JPH01187845A (en) | 1988-01-21 | 1988-01-21 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01187845A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03283647A (en) * | 1990-03-30 | 1991-12-13 | Mitsui High Tec Inc | Lead frame |
| KR100674502B1 (en) * | 1999-12-28 | 2007-01-25 | 삼성전자주식회사 | Bottom Lead Plastic Type Semiconductor Chip Package |
-
1988
- 1988-01-21 JP JP63011903A patent/JPH01187845A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03283647A (en) * | 1990-03-30 | 1991-12-13 | Mitsui High Tec Inc | Lead frame |
| KR100674502B1 (en) * | 1999-12-28 | 2007-01-25 | 삼성전자주식회사 | Bottom Lead Plastic Type Semiconductor Chip Package |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH01187845A (en) | Semiconductor device | |
| JPS6028256A (en) | Semiconductor device | |
| JPS628033B2 (en) | ||
| JPH0228966A (en) | Semiconductor device | |
| JP3134445B2 (en) | Resin-sealed semiconductor device | |
| JP2679848B2 (en) | Semiconductor device | |
| JPH03248455A (en) | Lead frame | |
| JPS59198744A (en) | Resin sealed type semiconductor device | |
| JPH0233961A (en) | Lead frame | |
| JPH01257361A (en) | Resin-sealed semiconductor device | |
| JPS61174755A (en) | Resin sealed type semiconductor device | |
| JPH01215049A (en) | Semiconductor device | |
| JPH06832Y2 (en) | Semiconductor device | |
| JPH0750388A (en) | Resin-sealed semiconductor device and manufacture thereof | |
| JPH03283648A (en) | Resin-sealed type semiconductor device | |
| JPS6333851A (en) | Package for ic | |
| JPH02166759A (en) | Lead frame | |
| JPH0637234A (en) | Semiconductor device | |
| JPS6342149A (en) | Resin sealed type semiconductor device | |
| JPS61269349A (en) | Lead frame | |
| JPH1022441A (en) | Lead frame | |
| JPH05243456A (en) | Plastic molded type semiconductor device | |
| JPH01135058A (en) | Semiconductor device | |
| JPH01173747A (en) | Resin-sealed semiconductor device | |
| JPH11121677A (en) | Resin encapsulated-type semiconductor device |