JPH01180058A - Information processor - Google Patents

Abstract

PURPOSE:To decrease the number of signal lines in a whole device by sending a bus using request and a bus using request allowance to a data bus. CONSTITUTION:A control bus 4 is set to a bus request mode by a bus control means 1 and this set is detected by respective bus requesting means 2. One signal line to be allocated out of a data bus 3 is caused to be '1' and the using request is sent on the bus 3. Next, the means 1 reads the using request on the bus 3 and considers priority. After that, the bus 4 is set to a bus acknowledge mode and one signal line to correspond to one of the bus requesting means 2 on the bus 3 is caused to be '1'. Then, the using allowance is given to the means 2. On the other hand, in the other means 2, control is executed so that the bus 3 can not be driven to '1' while the bus 4 is the bus acknowledge mode. The means 2 to obtain the using allowance sends a busy signal to the bus 4 and uses the bus 3 and a data transferring is executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is applied to an information processing apparatus in which a plurality of bus request means are connected to one data bus. In particular, it relates to means for controlling bus usage requests and usage permissions.

〔Music required〕

The present invention provides an information processing device that acquires the right to use a data bus and transfers data, by using the signal line used for transferring information that is given and received with this right to use also for data transfer. This makes it possible to suppress the increase in the number of signal lines.

[Conventional technology]

Conventionally, in this type of bus control means, a bus use request signal line and a bus use permission signal line were set separately from the data bus for each means using the bus.

[Problem that the invention seeks to solve]

In such conventional bus control means, at least two signal lines are set for each means that uses the bus, so the number of bus control signal lines that takes into account the maximum number of means that use the bus must be provided in the hardware. This has the disadvantage of increasing the number of signal lines for the entire installation.

SUMMARY OF THE INVENTION The present invention aims to eliminate such drawbacks and provides an information processing apparatus having a bus control means that can time-divisionally use a data bus as a path for bus control signals.

[Means for solving problems]

The present invention provides a data bus having a plurality of signal lines, a plurality of bus request means connected to the data bus, and a bus request by determining the priority order of bus usage requests issued from the plurality of bus request means. bus control means for providing use permission information to one of the means, and for giving a signal to prohibit the issuance of bus use request information from other bus request means when one of the bus request means acquires the use permission information; In the information processing device, the data bus has one signal line to which one bus request information and bus usage permission information corresponding to this bus request information are transferred in correspondence with each of the bus request means. Features.

[Effect]

The bus requesting means for data transfer first issues bus use request information to the bus control means, and the bus control means determines the priority order of this bus use request information and determines the order of permission. The bus requesting means that has obtained the bus use permission information transfers data. This bus use request information, bus use permission information, and data are transferred on the same signal line.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings. 1st
The figure is a block configuration diagram showing the configuration of this embodiment.

As shown in FIG. 1, this embodiment includes a data bus 3 having a plurality of signal lines, a plurality of bus request means 2 connected to this data bus 3, and a plurality of bus request means 2. The bus request means 2 determines the priority of the bus use request and gives use permission information to one of the bus request means 2.
bus control means 1 for providing a signal to prohibit the issuance of bus use request information from other bus request means when one of the bus request means acquires use permission information; It has one signal line through which one piece of bus use request information and bus use permission information corresponding to this bus request information are transferred in correspondence with each other. That is, this embodiment is comprised of a bus control means 1, a bus request means 2, a data bus 3, and a control bus 4.

Next, the operation of this embodiment will be explained based on FIGS. 1 and 2. First, the bus control means 1 sets the control bus 4 to bus request mode.

Each bus request means 2 detects this, and when it is necessary to use the data bus 3, sets one assigned signal line of the data bus 3 to logic "L" and issues a use request on the data bus 3. Send. Next, the bus control means 1 reads the usage request on the data bus 3, and after considering the priority,
The control bus 4 is set to a bus acknowledge mode, and one signal line corresponding to one bus requesting means 2 on the data bus 3 is set to logic "1" to give use permission to one bus requesting means 2. On the other hand, the other bus request means controls the data bus 3 not to be driven to logic "1" while the control bus 4 is in the pass acknowledge mode.

The bus requesting means that has received permission to use the bus sends a busy signal to the control bus 4 and uses the data bus 3 to transfer data. Note that the hardware can be simplified by using the same signal line as the bus use request signal line through which the bus request means 2 sends the use request and the use permission signal line through which the use permission is returned. Furthermore, even when the data bus 3 is used for bus use request information and bus use permission information, a parity bit may be provided to improve reliability.

〔Effect of the invention〕

As described above, the present invention sends the bus use request and the bus use request permission to the data bus, and therefore has the effect of reducing the number of signal lines in the entire device.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a flowchart showing the operation of the embodiment of the present invention. 1... bus control means, 2... bus request means, 3...
・Data bus, 4...Control bus.

Claims (1)

[Claims] 1. A data bus having a plurality of signal lines, a plurality of bus request means connected to the data bus, and determining the priority of bus use requests issued from the plurality of bus request means. bus control device which provides use permission information to one of the bus request means, and when one of the bus request means obtains the use permission information, gives a signal to prohibit the issuance of bus use request information from other bus request means. In the information processing device, the data bus is one signal line to which one bus request information and bus usage permission information for this bus request information are transferred in correspondence with each of the bus request means. An information processing device comprising: