JPS6158072A - System control device - Google Patents

System control device

Info

Publication number
JPS6158072A
JPS6158072A JP18126984A JP18126984A JPS6158072A JP S6158072 A JPS6158072 A JP S6158072A JP 18126984 A JP18126984 A JP 18126984A JP 18126984 A JP18126984 A JP 18126984A JP S6158072 A JPS6158072 A JP S6158072A
Authority
JP
Japan
Prior art keywords
control
control information
system control
channel
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18126984A
Other languages
Japanese (ja)
Inventor
Jitsuo Masuda
増田　実夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18126984A priority Critical patent/JPS6158072A/en
Publication of JPS6158072A publication Critical patent/JPS6158072A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Abstract

PURPOSE:To decrease the number of times of an access of a main memory device, transfer control information in parallel and to improve processing speed by installing a control table, which stores control information controlling a sub-channel, to a system control device. CONSTITUTION:At a system control device 10, a control table 11 which stores control information controlling a sub-channel group 5, and a control circuit 12 which controls the control table 11 are installed. A deciding part 13 is also installed in which it decides which data request signal and control information request signal an input signal from a central processing device 1 and a channel device 4 is, and it operates as a means accessing the control table. If control information from the central processing device 1 or the channel device 4 is required, the deciding part 13 indicates the control circuit 12 to retrieve the control table 11 and returns the retrieved resultto the equivalent device.

Description

【発明の詳細な説明】 （産業上の利用分野） 本発明は中央処理装置システムの主記憶装置の制御を行
うシステム制御装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a system control device that controls a main storage device of a central processing unit system.

電子計算機システムは処理データの増大と共に高速性が
要求されている。このシステム構成の一例を第２図に示
す。中央処理装置１，２はシステム制御装置３と主記憶
インタフェースを介して接続される。システム制御装置
３はチャネル装置４と主記憶インタフェースを介して接
続され、チャネル装置４は複数のサブチャネル（以後サ
ブチャネル群と記す）５に接続される。また更に、シス
テム制御装置３は主記憶装置６とサービス・プロセ・ノ
サ７と接続されている。上記したシステムで高速性を要
求する場合に、中央処理装置１，２とシステム制御装置
３とチャネル装置４の三者間の処理速度を高めることが
必要となる。Electronic computer systems are required to be faster as the amount of data they process increases. An example of this system configuration is shown in FIG. The central processing units 1 and 2 are connected to the system control unit 3 via a main memory interface. The system control device 3 is connected to a channel device 4 via a main memory interface, and the channel device 4 is connected to a plurality of subchannels (hereinafter referred to as a subchannel group) 5. Furthermore, the system control device 3 is connected to a main storage device 6 and a service processor 7. When high speed is required in the above system, it is necessary to increase the processing speed among the central processing units 1 and 2, the system control unit 3, and the channel device 4.

〔従来の技術〕[Conventional technology]

従来のシステムにおいては、サブチャネル群５を制御す
る制御情報が主記憶装置６に格納されている。従って、
中央処理装置１．２とチャネル装置４或いはサブチャネ
ル群５は、システム制御装置３を介して、サブチャネル
群５を制御する制御情報の授受を行うこととなる。In the conventional system, control information for controlling subchannel group 5 is stored in main memory 6 . Therefore,
Central processing unit 1.2 and channel device 4 or subchannel group 5 exchange control information for controlling subchannel group 5 via system control device 3.

〔発明がＩＷ決しようとする問題点〕[Problems that the invention attempts to resolve]

上記したシステム制御装置を介して制御情ＪｉＵの授受
を行い、システム制御装置が介在するごとに依って処理
速度の低下を来すと云う問題と、中央処理装置の主記憶
装置及びチャネル装置をアクセスする負荷が多くなると
云う問題がある。Control information is sent and received via the system control device described above, and there is a problem that the processing speed decreases every time the system control device intervenes, and the main storage device and channel device of the central processing unit are accessed. There is a problem that the load increases.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

本発明は、上記問題点を解消した制御情報授受の行える
システム制御装置を提供するものである。The present invention provides a system control device capable of exchanging control information that solves the above problems.

その手段は、中央処理装置とチャネル装置と主記憶装置
からなる三者間のインクフエエース制御を行うシステム
制御装置に、前記チャネル装置に接続されるザブチャネ
ルを制御する制御１ｎ報を格納する制御テーブルを付設
すると共に、該制御テーブルをアクセスする手段を備え
、中央処理装置とチャネル装置とがシステム制御装置と
前記制御情報の授受を行うシステム制御装置によってな
される。The means for doing so is to provide a system control device that performs ink network control between three parties consisting of a central processing unit, a channel device, and a main storage device, and a control table that stores control information for controlling subchannels connected to the channel device. and a means for accessing the control table, and the central processing unit and the channel device are controlled by the system control device which exchanges the control information with the system control device.

〔作用〕[Effect]

サブチャネルを制御する制御情報を格納する制御テーブ
ルをシステム制御装置に付設して、中央処理装置とチャ
ネル装置が直接システム制御装置と制御情報の授受を行
うのである。A control table that stores control information for controlling subchannels is attached to the system control device, and the central processing unit and channel device directly exchange control information with the system control device.

〔実施例〕〔Example〕

以下、図面を参照して本発明の実施例を詳に、ＩＩｌに
説明する。Hereinafter, embodiments of the present invention will be described in detail in IIl with reference to the drawings.

第１図は本発明によるシステム制御装置の一実施例の要
部ブロック図である。企図を通じて同で個所は同符号を
用いる。システム制御装置１０には、ザブチャネル群５
を制御する制御情報を格納する制御テーブル１１とこの
制御テーブル１１を制御する制御回路１２と中央処理装
置１とチャネル装置４からの入力信号がデータ要求信号
、制御情報要求信号の何れやを判定し、制御テーブルを
アクセスする手段として動作する判定部１３とが設けで
ある。FIG. 1 is a block diagram of essential parts of an embodiment of a system control device according to the present invention. The same reference numerals will be used throughout the plan. The system control device 10 includes subchannel group 5.
A control table 11 that stores control information for controlling the control table 11, a control circuit 12 that controls the control table 11, and input signals from the central processing unit 1 and channel device 4 determine whether the input signals are a data request signal or a control information request signal. , and a determination unit 13 that operates as means for accessing the control table.

若し、中央処理装置１、或いはチャネル装置４から制御
情報を要求すると、判定部１３は制御回路１２に制御テ
ーブル１１を検索するように指示し、検。If control information is requested from the central processing unit 1 or the channel device 4, the determination unit 13 instructs the control circuit 12 to search the control table 11, and performs the search.

索結果を該当する装置に送り返す。Send search results back to the appropriate device.

若し、データ要求であれば、判定部１３は制御回路１２
を作動することなく、従来のようにシステム制御装置１
０は主記憶装置６を検索して該当する装置に応答を行う
。上記した制御情報とデータとの授受は並行して実施さ
れても何等支障されるものでない。また一般に、主記憶
装置に用いられる排他制御については、この制御テーブ
ルにも適用される。If it is a data request, the determination unit 13
system control device 1 as before.
0 searches the main storage device 6 and sends a response to the corresponding device. Even if the above-described exchange of control information and data is carried out in parallel, there will be no problem. In general, exclusive control used for main storage devices is also applied to this control table.

（発明の効果〕 以上説明したように本発明によれば、ザブチャネル制御
情報が直接システム制御装置との間にて授受が行え、そ
の分生記憶装置のアクセス回数を減少すると共に、制御
情報授受が並列して行え、処理速度を向上する上で効果
を発揮する。(Effects of the Invention) As explained above, according to the present invention, subchannel control information can be directly exchanged with the system control device, the number of accesses to the raw storage device can be reduced, and control information can be exchanged. It can be performed in parallel and is effective in improving processing speed.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明によるシステム制御装置の一実施例の要
部ブロック図、 第２図はシステム構成図である。 図において、１と２は中央処理装置、３と１０はシステ
ム制御装置、４はチャネル装置、５はサブチャネル群、
１１は制御テーブルをそれぞれ示す。 第１１！１ 第２図FIG. 1 is a block diagram of a main part of an embodiment of a system control device according to the present invention, and FIG. 2 is a system configuration diagram. In the figure, 1 and 2 are central processing units, 3 and 10 are system control units, 4 is a channel device, 5 is a subchannel group,
Reference numerals 11 and 11 respectively indicate control tables. 11!1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 中央処理装置とチャネル装置と主記憶装置からなる三者
間のインタフェース制御を行うシステム制御装置に、前
記チャネル装置に接続されるサブチャネルを制御する制
御情報を格納する制御テーブルを付設すると共に、該制
御テーブルをアクセスする手段を備え、前記中央処理装
置とチャネル装置とがシステム制御装置と前記制御情報
の授受を行うことを特徴とするシステム制御装置。A system control device that controls the interface between the central processing unit, the channel device, and the main storage device is provided with a control table that stores control information for controlling subchannels connected to the channel device, and a control table that stores control information for controlling subchannels connected to the channel device. A system control device comprising means for accessing a control table, wherein the central processing unit and the channel device exchange the control information with the system control device.
JP18126984A 1984-08-29 1984-08-29 System control device Pending JPS6158072A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18126984A JPS6158072A (en) 1984-08-29 1984-08-29 System control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18126984A JPS6158072A (en) 1984-08-29 1984-08-29 System control device

Publications (1)

Publication Number Publication Date
JPS6158072A true JPS6158072A (en) 1986-03-25

Family

ID=16097738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18126984A Pending JPS6158072A (en) 1984-08-29 1984-08-29 System control device

Country Status (1)

Country Link
JP (1) JPS6158072A (en)

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