JPH01173945U - - Google Patents
Info
- Publication number
- JPH01173945U JPH01173945U JP1988067998U JP6799888U JPH01173945U JP H01173945 U JPH01173945 U JP H01173945U JP 1988067998 U JP1988067998 U JP 1988067998U JP 6799888 U JP6799888 U JP 6799888U JP H01173945 U JPH01173945 U JP H01173945U
- Authority
- JP
- Japan
- Prior art keywords
- ceiling
- base
- seal cover
- hermetic seal
- shaped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005219 brazing Methods 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 1
- 229910000743 fusible alloy Inorganic materials 0.000 claims 1
- 229910052738 indium Inorganic materials 0.000 claims 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Connections Arranged To Contact A Plurality Of Conductors (AREA)
Description
第1図は本考案のハーメチツクシールカバーの
一例を示す断面図、第2図は該カバーを用いたI
Cパツケージの断面図、第3図及び第4図は従来
のハーメチツクシールカバーによるICパツケー
ジの工程を示す断面図である。 1……多層セラミツク基板、2……導電膜、3
……外部リード、4……IC素子、5……ボンデ
イング線、6……メタライズ層、7……ろう材、
8……従来のハーメチツクシールカバー、9……
本考案のハーメチツクシールカバー。
一例を示す断面図、第2図は該カバーを用いたI
Cパツケージの断面図、第3図及び第4図は従来
のハーメチツクシールカバーによるICパツケー
ジの工程を示す断面図である。 1……多層セラミツク基板、2……導電膜、3
……外部リード、4……IC素子、5……ボンデ
イング線、6……メタライズ層、7……ろう材、
8……従来のハーメチツクシールカバー、9……
本考案のハーメチツクシールカバー。
Claims (1)
- 金属平板のプレス加工によりリング状の基部と
キヤツプ状の天井部が形成され、該基部及び天井
部の下面全面に鉛、錫又はインジウムを主成分と
する低融点合金ろう材が被着されてなるハーメチ
ツクシールカバー。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988067998U JPH01173945U (ja) | 1988-05-25 | 1988-05-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988067998U JPH01173945U (ja) | 1988-05-25 | 1988-05-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01173945U true JPH01173945U (ja) | 1989-12-11 |
Family
ID=31293329
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988067998U Pending JPH01173945U (ja) | 1988-05-25 | 1988-05-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01173945U (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57112054A (en) * | 1980-12-29 | 1982-07-12 | Fujitsu Ltd | Semiconductor device |
-
1988
- 1988-05-25 JP JP1988067998U patent/JPH01173945U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57112054A (en) * | 1980-12-29 | 1982-07-12 | Fujitsu Ltd | Semiconductor device |
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