JPH01160100A - Mounting - Google Patents

Mounting

Info

Publication number
JPH01160100A
JPH01160100A JP62319229A JP31922987A JPH01160100A JP H01160100 A JPH01160100 A JP H01160100A JP 62319229 A JP62319229 A JP 62319229A JP 31922987 A JP31922987 A JP 31922987A JP H01160100 A JPH01160100 A JP H01160100A
Authority
JP
Japan
Prior art keywords
pattern
mounting
recognition
lead
gravity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62319229A
Other languages
Japanese (ja)
Inventor
Kazuharu Saito
齋藤 和春
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP62319229A priority Critical patent/JPH01160100A/en
Publication of JPH01160100A publication Critical patent/JPH01160100A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable mounting accuracy of ICs to be improved and an automation rate to be improved by providing a process for judging whether a pattern recognition is appropriate or not, by recognizing other IC patterns when the recognition was not performed appropriately, by performing compensation of pattern position of ICs when the recognition failed, and then mounting the ICs. CONSTITUTION:The center of gravity and slant of an IC which was placed on a stage 55 is measured and a robot 51 performs vacuum sucking of the position of center of gravity being based on this information. Since the position of IC enables video image to be taken through a transmission light, thus allowing for a stable recognition. Then, the robot 51 shifts a camera 53 to a position on a substrate for mounting IC, measures the position and slant of center of gravity of lead pattern on the substrate, and can accurately mount the IC on the lead pattern of substrate. If the recognition failed, the position of lead patterns 42 and 43 of the next IC mounting position is recognized and the position of the lead pattern 41 can be compensated relatively from the position of these two lead patterns. Being based on the compensation value, the IC picked up from the stage 55 can be mounted onto the printed-circuit board.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は複数の半導体装置(以下ICと称す)を基板上
に実装する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for mounting a plurality of semiconductor devices (hereinafter referred to as ICs) on a substrate.

〔従来の技術〕[Conventional technology]

複数の半導体装置を基板上に実装する場合、中でもます
ます高密度化されつつある基板に多ピンのピン間隔の小
さいフラット・パッケージなどのICを実装する場合に
は、基板上のパターンの位置のばらつきを補正するなめ
に、半導体装置ごとに設けられた基準パターンを認識し
、搭載することが行なわれている。第4図〜第5図は従
来の実装方法を説明する図であり、基準パターンには位
置認識用に特別に設けられたパターン1やリード・パタ
ーン2を用いるのが一般的である。パターン1の場合は
2つのパターンの重心位置からIC搭載位置と傾きを決
めることができ、リード・パターン2の場合は4つの方
向3.4.5.6に設けられたパターンのそれぞれの重
心7.8.9.10を求め、直線7−9と8−10の交
点11として搭載位置を求める。傾きは直線7−8の傾
きと9−10の傾きとを平均して求めることができる。
When mounting multiple semiconductor devices on a board, especially when mounting ICs such as flat packages with a large number of pins and narrow pin spacing on boards that are becoming increasingly dense, it is important to consider the position of patterns on the board. In order to correct variations, a reference pattern provided for each semiconductor device is recognized and mounted. FIGS. 4 and 5 are diagrams for explaining the conventional mounting method, and it is common to use pattern 1 or lead pattern 2 specially provided for position recognition as the reference pattern. In the case of pattern 1, the IC mounting position and inclination can be determined from the center of gravity positions of the two patterns, and in the case of lead pattern 2, the center of gravity 7 of each pattern provided in four directions 3.4.5.6 can be determined. .8.9.10 is determined, and the mounting position is determined as the intersection point 11 of straight lines 7-9 and 8-10. The slope can be determined by averaging the slopes of straight lines 7-8 and 9-10.

このように基板上のパターンを認識して搭載位置を決定
することができるか、認識に当っては、照明のばらつき
、基板ごとのパターンの表面状態のばらつき(汚れ、ハ
ンダののり具合、フラックスののり具合、レジストのか
かり具合など)によって安定した画像の取り込みができ
ないことが多い。従来はこういった画像のばらつきに対
しては照明の調整、二値画像のスレショルド・レベルの
自動調整、多値画像によるソフトウェアでの補正などで
対応し、対向しきれないものは位置認識の誤差として搭
載精度を悪くし、歩留りをさげる原因となっていた。例
えは、パターン1において、真円である基準パターンか
ハンダ・コートの盛りあかり具合で一部が欠けるような
第6図のような二値画像かえられ、重心が本来20であ
るべきものか21として判断されてしまうといったこと
である。
In this way, whether it is possible to recognize the pattern on the board and determine the mounting position, it is necessary to check for variations in lighting, variations in the surface condition of the pattern on each board (dirt, solder paste, flux, etc.). In many cases, it is not possible to capture a stable image depending on the condition of the adhesive (adhesion condition, resist coverage, etc.). Conventionally, such image variations have been dealt with by adjusting lighting, automatically adjusting the threshold level of binary images, and using software to compensate for multilevel images. This resulted in poor mounting accuracy and reduced yield. For example, in pattern 1, if the reference pattern is a perfect circle or the binary image shown in Figure 6 is partially missing due to the amount of solder coat, the center of gravity should be 20 or 21. This means that it will be judged as such.

〔発明が解決しようとする問題点〕 本発明はかかる欠点を除去するもので、本発明の目的は
、パターン認識が正しく行なわれたか否かを判別する工
程を設けることによって認識のばらつきによるIC搭載
の位置のばらつきを除き、さらに認識が正しく行なわれ
なかった時に、他の搭載ICのためのパターンを認識し
、そのパターン位置を基準にして認識できなかったIC
のパターン位置の補正を行い搭載することによってIC
搭載精度の向上と、自動化率の向上をはかるものである
[Problems to be Solved by the Invention] The present invention eliminates such drawbacks, and an object of the present invention is to provide a process for determining whether pattern recognition has been performed correctly, thereby preventing IC mounting due to recognition variations. In addition, when the recognition is not performed correctly, the pattern for other installed ICs is recognized, and the IC that could not be recognized based on the pattern position.
By correcting the pattern position and mounting the IC
This aims to improve mounting accuracy and automation rate.

〔問題点を解決するための手段〕[Means for solving problems]

本発明による実装方法は、複数の半導体装置を基板上に
実装する実装方法において、 (1)半導体装置ごとに設けられた基板上のパターンの
位置を認識する工程。
A mounting method according to the present invention is a mounting method for mounting a plurality of semiconductor devices on a substrate, including: (1) recognizing the position of a pattern on the substrate provided for each semiconductor device;

(2)前記パターンの位置を正しく認識できたか否かを
判別する工程。
(2) A step of determining whether the position of the pattern has been correctly recognized.

(3)前記パターンの位置認識が正しく認識できない時
に別の半導体装置のパターンを認識する工程。
(3) A step of recognizing a pattern of another semiconductor device when the position of the pattern cannot be correctly recognized.

(4)前記側の半導体装置のパターン位置から認識でき
なかったパターンの半導体装置の実装位置を演算し、実
装する工程。
(4) A step of calculating and mounting a mounting position of a semiconductor device of a pattern that cannot be recognized from the pattern position of the semiconductor device on the side.

とからなることを特徴とする。It is characterized by consisting of.

〔実 施 例〕〔Example〕

第1図は6個のフラット・パッケージIC41〜46を
実装する基板54を示す図であり、41〜46にはIC
のリードに対応するパターンが形成されており、ICの
リードをこれに合わせて搭載し、その後リフローエ穆に
よって接合する。
FIG. 1 is a diagram showing a board 54 on which six flat package ICs 41 to 46 are mounted.
A pattern corresponding to the leads is formed, and the IC leads are mounted in accordance with this pattern and then bonded using a reflow process.

第2図はICを基板54上に自動搭載するマウンタで、
51は直交座標型のロボットで、回転軸を含むハンド5
2とパターン認識用カメラ53を備えている。55はI
Cの位置認識ステージで、図示されていないロボットに
よって供給されたICの位置認識を行なう。54は第1
図で示した基板である。
Figure 2 shows a mounter that automatically mounts an IC on a board 54.
51 is a Cartesian coordinate type robot, with a hand 5 including a rotation axis.
2 and a pattern recognition camera 53. 55 is I
At the position recognition stage C, the position of the IC supplied by a robot (not shown) is recognized. 54 is the first
This is the board shown in the figure.

ステージ55上に置かれたICは第5図で説明したのと
同じ原理により、重心位置と傾きを計測し、ロボット5
1はこの情報に基すき、ICの重心位置を真空吸着する
。この時ICの位置は透過光によって画像取込みか可能
なため、比較的安定した認識が可能である5次にロボッ
ト51はカメラ53を基板54のIC搭載位置へ移動さ
せ、基板上のリードパターンの重心位置と傾きを計測す
る。この結果に基すき、ICを基板のリード・パターン
上に正確に搭載することかできる。
The IC placed on the stage 55 measures the center of gravity position and inclination using the same principle as explained in FIG.
1 is based on this information, and the position of the center of gravity of the IC is vacuum-adsorbed. At this time, since the IC position can only be imaged using transmitted light, relatively stable recognition is possible.Fifth, the robot 51 moves the camera 53 to the IC mounting position on the board 54, and checks the lead pattern on the board. Measure the center of gravity position and inclination. Based on this result, it is possible to accurately mount the IC on the lead pattern of the board.

ここで基板のリード・パターンの認識は反射光によるた
め、基板の表面状態、特にハンダメツキの状態、レジス
トの状態、ハンダ・ペーストの印刷状態などにより安定
して行なうことは困難である。これを安定して行なうこ
とは重要な技術であるか、本願の主題とは異なるので省
略するが、認識か正しく行なわれたか否かは、リードの
本数をチエツクしたり、リード・ピッチをチエツクする
ことで可能である。本発明によるマウンタは、認識が正
確に出来なかった時に、次のIC搭載位置のリード・パ
ターン42及び43の位置を認識する。これら2つのリ
ード・パターンの位置がら相対向にリード・パターン4
1の位置を補正することができる。位置補正のアルゴリ
ズムは周知のものである。補正値に基つきステージ55
からピック・アップしたICを基板上に実装する。
Here, since the lead pattern on the board is recognized by reflected light, it is difficult to recognize it stably depending on the surface condition of the board, especially the state of solder plating, the state of resist, the state of printing of solder paste, etc. Doing this stably is an important technique, and since it is different from the subject of this application, I will omit it here, but to check whether the recognition is done correctly or not, check the number of leads and check the lead pitch. This is possible. The mounter according to the present invention recognizes the positions of the lead patterns 42 and 43 at the next IC mounting position when recognition cannot be performed accurately. Lead pattern 4 is placed opposite to the position of these two lead patterns.
1 position can be corrected. Algorithms for position correction are well known. Stage 55 based on correction value
The IC picked up from the board is mounted on the board.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば基板のパターンの位置認識
において、基板の表面状態などで二値画像取り込みにば
らつきがあっても、条件の良いパターンを認識すること
により、信頼性の高い搭載が可能である。
As described above, according to the present invention, when recognizing the position of a pattern on a board, even if there are variations in binary image capture due to the surface condition of the board, highly reliable mounting can be achieved by recognizing patterns with good conditions. It is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は基板に配設されたパターンを示す図。 第2図はIC基板上に搭載するマウンタの概要図で、第
3図は本発明の実装方法に係わるブロック図。第4図は
従来例におけるリード・パターンを示す図。第5図は従
来例におけるリードパターンを認識する際の認識マーク
を示す図。第6図は基準マークの二値画像を示す図。 1・・・・・・・・・パターン 2・ ・・・・・ ・ ・ ・リードパターン3.4.
5.6・・・パターンの配列方向7.8.9.10・・
重心 11・・・・・・・・・交点 20.21・・・・・・画像 41.42.43.44.43.46 ・・・・・・・・フラットパッケージIC51・・・・
・・・・・ロボット 52・・・・・・・・・ハンド 53・・・・・・・・・パターン認識用カメラ54・・
・・・・・・・基板 55・・・・・・・・・位置認識ステージ以上 出願人 セイコーエプソン株式会社
FIG. 1 is a diagram showing patterns arranged on a substrate. FIG. 2 is a schematic diagram of a mounter mounted on an IC board, and FIG. 3 is a block diagram related to the mounting method of the present invention. FIG. 4 is a diagram showing a lead pattern in a conventional example. FIG. 5 is a diagram showing recognition marks when recognizing a lead pattern in a conventional example. FIG. 6 is a diagram showing a binary image of a reference mark. 1... Pattern 2... Lead pattern 3.4.
5.6... Pattern arrangement direction 7.8.9.10...
Center of gravity 11...Intersection 20.21...Image 41.42.43.44.43.46...Flat package IC51...
...Robot 52 ... Hand 53 ... Pattern recognition camera 54 ...
・・・・・・Substrate 55・・・・・・Position recognition stage and above Applicant Seiko Epson Corporation

Claims (1)

【特許請求の範囲】 複数の半導体装置を基板上に実装する実装方法において
、 (1)半導体装置ごとに設けられた基板上のパターンの
位置を認識する工程。 (2)前記パターンの位置を正しく認識できたか否かを
判別する工程。 (3)前記パターンの位置認識が正しく認識できない時
に別の半導体装置のパターンを認 識する工程。 (4)前記別の半導体装置のパターン位置から認識でき
なかったパターンの半導体装置の 実装位置を演算し、実装する工程。 とからなることを特徴とする実装方法。
[Claims] In a mounting method for mounting a plurality of semiconductor devices on a substrate, the steps include: (1) recognizing the position of a pattern on the substrate provided for each semiconductor device; (2) A step of determining whether the position of the pattern has been correctly recognized. (3) A step of recognizing a pattern of another semiconductor device when the position of the pattern cannot be correctly recognized. (4) A step of calculating and mounting a mounting position of a semiconductor device of a pattern that cannot be recognized from the pattern position of the other semiconductor device. An implementation method characterized by comprising:
JP62319229A 1987-12-17 1987-12-17 Mounting Pending JPH01160100A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62319229A JPH01160100A (en) 1987-12-17 1987-12-17 Mounting

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62319229A JPH01160100A (en) 1987-12-17 1987-12-17 Mounting

Publications (1)

Publication Number Publication Date
JPH01160100A true JPH01160100A (en) 1989-06-22

Family

ID=18107849

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62319229A Pending JPH01160100A (en) 1987-12-17 1987-12-17 Mounting

Country Status (1)

Country Link
JP (1) JPH01160100A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188800A (en) * 1990-11-21 1992-07-07 Toshiba Corp Parts mounting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188800A (en) * 1990-11-21 1992-07-07 Toshiba Corp Parts mounting device

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