JPH01154650U - - Google Patents
Info
- Publication number
- JPH01154650U JPH01154650U JP5169688U JP5169688U JPH01154650U JP H01154650 U JPH01154650 U JP H01154650U JP 5169688 U JP5169688 U JP 5169688U JP 5169688 U JP5169688 U JP 5169688U JP H01154650 U JPH01154650 U JP H01154650U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- convex portion
- die stage
- lead
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 3
- 239000008188 pellet Substances 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims 2
- 239000012212 insulator Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は、本考案の半導体装置の平面図、第２
図は、第１図のＡ―Ａ′線における断面図、第３
図は、従来の半導体装置の平面図、第４図は、第
３図のＢ―Ｂ′線における断面図である。
１……リードフレーム、２……ダイステージ、
３……リード、５……半導体ペレツト、６……凸
部、７……金属細線。
FIG. 1 is a plan view of the semiconductor device of the present invention, and FIG.
The figure is a cross-sectional view taken along the line AA' in Figure 1;
The figure is a plan view of a conventional semiconductor device, and FIG. 4 is a cross-sectional view taken along line BB' in FIG. 3. 1 ...Lead frame, 2...Die stage,
3...Lead, 5...Semiconductor pellet, 6...Protrusion, 7...Thin metal wire.
Claims (1)
レームとこのリードフレームのダイステージに固
着する半導体ペレツトとこの半導体ペレツトの電
極とリードとを接続する金属細線とこの構成を封
止する封止部とを有する半導体装置に於いて、前
記ダイステージを臨む側のリード先端部に凸部を
設けることを特徴とした半導体装置。 (2) 凸部は金属細線と接触する位置にある請求
項第１項記載の半導体装置。 (3) 凸部は絶縁体である請求項第１項または第
２項記載の半導体装置。 (4) 凸部は、リード先端部を継ぎ帯状である請
求項第１項、第２項または第３項記載の半導体装
置。[Claims for Utility Model Registration] (1) A lead frame having a die stage and leads, a semiconductor pellet fixed to the die stage of this lead frame, a thin metal wire connecting the electrodes and leads of this semiconductor pellet, and this configuration. What is claimed is: 1. A semiconductor device having a sealing portion for sealing, wherein a convex portion is provided at a lead end portion on a side facing the die stage. (2) The semiconductor device according to claim 1, wherein the convex portion is located at a position where it contacts the thin metal wire. (3) The semiconductor device according to claim 1 or 2, wherein the convex portion is an insulator. (4) The semiconductor device according to claim 1, 2 or 3, wherein the convex portion has a band-like shape at the tip of the lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5169688U JPH01154650U (en) | 1988-04-18 | 1988-04-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5169688U JPH01154650U (en) | 1988-04-18 | 1988-04-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01154650U true JPH01154650U (en) | 1989-10-24 |
Family
ID=31277713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5169688U Pending JPH01154650U (en) | 1988-04-18 | 1988-04-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01154650U (en) |
-
1988
- 1988-04-18 JP JP5169688U patent/JPH01154650U/ja active Pending